English
Language : 

PIC18FXXK80 Datasheet, PDF (13/52 Pages) Microchip Technology – Flash Microcontroller Programming Specification
PIC18FXXK80 FAMILY
FIGURE 2-12:
EXITING LOW-VOLTAGE
PROGRAM/VERIFY MODE
P16
P17
MCLR/VPP/RE3
P1
D041
VDD
PGD
PGC
PGD = Input
FIGURE 2-13:
EXITING HIGH-VOLTAGE
PROGRAM/VERIFY MODE
P16
P17
MCLR/VPP/RE3
P1
D110
VDD
PGD
PGC
PGD = Input
2.7 Entering and Exiting Low-Voltage
ICSP Program/Verify Mode
As shown in Figure 2-10, entering Low-Voltage ICSP
Program/Verify mode requires three steps:
1. The MCLR pin is grounded.
2. A 32-bit key sequence is presented on PGD.
3. The MCLR pin is brought to VDD
The MCLR pin must be grounded during the transfer of
the key sequence. After MCLR is grounded, an interval
of at least P12 must elapse before presenting the key
sequence on PGD. The key sequence is a specific
32-bit pattern,‘0100 1101 0100 0011 0100 1000
0101 0000’ (more easily remembered as 4D434850h
in hexadecimal). The device will enter Program/Verify
mode only if the sequence is valid. The Most Significant
bit of the most significant nibble must be shifted in first.
Once the key sequence is complete, VIH, or usually
VDD, must be applied to MCLR and held at that level for
as long as Program/Verify mode is to be maintained.
There is no minimum time requirement before present-
ing data on PGD. On successful entry, the program
memory can be accessed and programmed in serial
fashion. While in the Program/Verify mode, all unused
I/Os are placed in the high-impedance state.
Exiting Program/Verify mode is done by grounding the
MCLR again, as shown in Figure 2-12. The only
requirement for exit is that an interval, P16, should
elapse between the last clock, and the program signals
on PGC and PGD before grounding MCLR.
2.8 Serial Program/Verify Operation
The PGC pin is used as a clock input pin, and the PGD
pin is used for entering command bits and data input/
output during serial operation. Commands and data are
transmitted on the rising edge of PGC, latched on the
falling edge of PGC, and are Least Significant bit (LSb)
first.
2.8.1 4-BIT COMMANDS
All instructions are 20 bits, consisting of a leading 4-bit
command, followed by a 16-bit operand, which
depends on the type of command being executed. To
input a command, PGC is cycled four times. The com-
mands needed for programming and verification are
shown in Table 2-3. Commands and data are entered
LSb first.
Depending on the 4-bit command, the 16-bit operand
represents 16 bits of input data, or 8 bits of input data
and 8 bits of output data.
Throughout this specification, commands and data are
presented as illustrated in Table 2-4. The 4-bit command
and data are shown Most Significant bit (MSb) first. The
command operand, or “Data Payload”, is shown as
<LSB><MSB>. Figure 2-14 demonstrates how to serially
present a 20-bit command/operand to the device.
 2011 Microchip Technology Inc.
DS39972B-page 13