PIC18FXXK80 Datasheet, PDF (47/52 Pages) Microchip Technology – Flash Microcontroller Programming Specification

PIC18FXXK80 FAMILY
6.0 AC/DC CHARACTERISTICS TIMING REQUIREMENTS
FOR PROGRAM/VERIFY TEST MODE
Standard Operating Conditions
Operating Temperature: 25C is recommended
Param
No.
Sym
Characteristic
Min
Max Units
Conditions
D110 VIHH High-Voltage Programming Voltage on
MCLR/VPP/RE3
VDD + 1.5 9
V
D111 VDD Supply Voltage during Programming
2.1
5.5
V Row Erase/Write for “F” parts
2.7
5.5
V Block Erase operations for
“F” parts
2.1
3.6
V Row Erase/Write for “LF”
parts
2.7
3.6
V Block Erase operations for
“LF” parts
D112 IPP
Programming Current on MCLR/VPP/RE3
—
600 A
D113 IDDP Supply Current during Programming
—
3.0 mA
D031 VIL
Input Low Voltage
VSS 0.2 VDD V
D041 VIH Input High Voltage
0.8 VDD VDD
V
D080 VOL Output Low Voltage
—
0.6
V IOL = 8.5 mA @ 4.5V
D090 VOH Output High Voltage
VDD – 0.7 —
V IOH = -3.0 mA @ 4.5V
D012 CIO Capacitive Loading on I/O Pin (PGD)
—
50 pF To meet AC specifications
P1 TR
MCLR/VPP/RE3 Rise Time to Enter
Program/Verify mode
—
1.0 s (Note 1)
P2 TPGC Serial Clock (PGC) Period
100
—
ns VDD = 5.0V
1
—
s VDD = 2.0V
P2A TPGCL Serial Clock (PGC) Low Time
40
—
ns VDD = 5.0V
400
—
ns VDD = 2.0V
P2B TPGCH Serial Clock (PGC) High Time
40
—
ns VDD = 5.0V
400
—
ns VDD = 2.0V
P3 TSET1 Input Data Setup Time to Serial Clock 
P4 THLD1 Input Data Hold Time from PGC
15
—
ns
15
—
ns
P5 TDLY1 Delay between 4-Bit Command and Command
Operand
40
—
ns
P5A TDLY1A Delay between 4-Bit Command Operand and Next
40
4-Bit Command
—
ns
P6 TDLY2 Delay between Last PGC  of Command Byte to
20
—
ns
First PGC  of Read of Data Word
P9 TDLY5 PGC High Time (minimum programming time)
1
— ms Externally timed
P9A TDLY5A PGC High Time
5
— ms Configuration Word
programming time
P10 TDLY6 PGC Low Time after Programming
(high-voltage discharge time)
100
—
s
Note 1:
Do not allow excess time when transitioning MCLR between VIL and VIHH; this can cause spurious program
executions to occur. The maximum transition time is:
1 TCY + TPWRT (if enabled) + 1024 TOSC (for LP, HS, HS/PLL and XT modes only) +
2 ms (for HS/PLL mode only) + 1.5 s (for EC mode only)
where TCY is the instruction cycle time, TPWRT is the Power-up Timer period and TOSC is the oscillator period. For
specific values, refer to the Electrical Characteristics section of the device data sheet for the particular device.
 2011 Microchip Technology Inc.
DS39972B-page 47