PIC18FXXK80 Datasheet, PDF (39/52 Pages) Microchip Technology – Flash Microcontroller Programming Specification

PIC18FXXK80 FAMILY
TABLE 5-3: PIC18FXXK80 FAMILY CONFIGURATION BIT DESCRIPTIONS (CONTINUED)
Bit Name
Configuration
Words
Description
EBTR2
CONFIG7L
Table Read Protection bit (Block 2 code memory area)
1 = Block 2 is not protected from table reads executed in other blocks
0 = Block 2 is protected from table reads executed in other blocks
EBTR1
CONFIG7L
Table Read Protection bit (Block 1 code memory area)
1 = Block 1 is not protected from table reads executed in other blocks
0 = Block 1 is protected from table reads executed in other blocks
EBTR0
CONFIG7L
Table Read Protection bit (Block 0 code memory area)
1 = Block 0 is not protected from table reads executed in other blocks
0 = Block 0 is protected from table reads executed in other blocks
EBTRB
CONFIG7H
Table Read Protection bit (Boot Block memory area)
1 = Boot Block is not protected from table reads executed in other blocks
0 = Boot Block is protected from table reads executed in other blocks
DEV<10:3>
DEVID2
Device ID bits
These bits are used with the DEV<2:0> bits in the DEVID1 register to
identify the part number.
DEV<2:0>
DEVID1
Device ID bits
These bits are used with the DEV<10:3> bits in the DEVID2 register to
identify the part number.
REV<4:0>
DEVID1
Revision ID bits
These bits are used to indicate the revision of the device.
Note 1:
2:
3:
The BBSIZ bit cannot be changed once any of the following code-protect bits are enabled: CPB or CP0, WRTB or
WRT0, EBTRB or EBTR0.
Available on PIC18F6XKXX devices only.
This bit must be maintained as ‘0’ on 28-pin PIC18F2XK80 and 40-pin PIC18F4XK80 devices.
 2011 Microchip Technology Inc.
DS39972B-page 39