LAN8810I-AKZE Datasheet, PDF (71/100 Pages) Microchip Technology – GMII 10/100/1000 Ethernet Transceiver with HP Auto-MDIX Support

4.3.4
GMII 10/100/1000 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
Receive Error-Free Packets Counter High Register
Index:
U2
Size:
16 bits
BITS
15:0
DESCRIPTION
RCVGPKT[47:32]
Counts the received error-free packets.
Contains the 16 upper bits of the 48-bit counter.
Reading this register resets all bits in the Receive Error-Free Packets
Counter.
TYPE
RO/
RC
DEFAULT
0000h
Note:
The 48-bit receive error-free packets counter is split across 3 registers. In order to read the
counter correctly, the registers must be read in the following order: Receive Error-Free Packets
Counter Low Register, Receive Error-Free Packets Counter Mid Register, Receive Error-Free
Packets Counter High Register. After reading the high register, the counter will be automatically
cleared.
SMSC LAN8810/LAN8810i
71
DATASHEET
Revision 1.0 (02-06-13)