LAN8810I-AKZE Datasheet, PDF (54/100 Pages) Microchip Technology – GMII 10/100/1000 Ethernet Transceiver with HP Auto-MDIX Support

GMII 10/100/1000 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
4.2.10 Master/Slave Control Register
Index (In Decimal): 9
Size:
16 bits
BITS
DESCRIPTION
15:13
12
11
10
9
8
7:0
Test Mode
000 = Normal mode
001 = Test Mode 1 - Transmit waveform test
010 = Test Mode 2 - Transmit jitter test in Master mode
011 = Test Mode 3 - Transmit jitter test in Slave mode
100 = Test Mode 4 - Transmitter distortion test
101 = Reserved
110 = Reserved
111 = Reserved
Note: Setting these bits may prevent correct link partner connection if
both the device PHY and link partner PHY are set as masters.
Master/Slave Manual Config Enable
0 = disable MASTER-SLAVE manual configuration value
1 = enable MASTER-SLAVE manual configuration value
Master/Slave Manual Config Value
Active only when the Master/Slave Manual Config Enable bit of this register
is 0.
0 = Slave
1 = Master
Port Type
Active only when the Master/Slave Manual Config Enable bit of this register
is 0.
0 = Single port device
1 = Multiport device
1000BASE-T Full Duplex
0 = advertise PHY is not 1000BASE-T full duplex capable
1 = advertise PHY is 1000BASE-T full duplex capable
1000BASE-T Half Duplex
0 = advertise PHY is not 1000BASE-T half duplex capable
1 = advertise PHY is 1000BASE-T half duplex capable
RESERVED
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
RO
DEFAULT
000b
Note 4.5
Note 4.5
Note 4.5
Note 4.5
Note 4.5
-
Note 4.5 The default is determined by the CONFIG[3:2] pins as described in Section 3.8.1.2.3,
"Configuration Bits Impacted by the Mode of Operation," on page 33.
Revision 1.0 (02-06-13)
54
DATASHEET
SMSC LAN8810/LAN8810i