PIC16F631_08 Datasheet, PDF (67/306 Pages) Microchip Technology – 20-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F631/677/685/687/689/690
4.2.5.2 RA1/AN1/C12IN0-/VREF/ICSPCLK
Figure 4-2 shows the diagram for this pin. The
RA1/AN1/C12IN0-/VREF/ICSPCLK pin is configurable to
function as one of the following:
• a general purpose I/O
• an analog input for the ADC (except PIC16F631)
• an analog input to Comparator C1 or C2
• a voltage reference input for the ADC
• In-Circuit Serial Programming clock
FIGURE 4-2:
BLOCK DIAGRAM OF RA1
Data Bus
DQ
WR
WPUA
CK _Q
RD
WPUA
Analog⁽¹⁾
Input Mode
RABPU
VDD
Weak
DQ
WR
PORTA
CK _Q
WR
TRISA
DQ
CK _Q
RD
TRISA
VDD
I/O Pin
VSS
Analog⁽¹⁾
Input Mode
RD
PORTA
DQ
WR
IOCA
CK _Q
RD
IOCA
QD
EN
Q3
QD
EN
Interrupt-on-
Change
RD PORTA
To Comparator
To A/D Converter⁽²⁾
Note 1: ANSEL determines Analog Input mode.
2: Not implemented on PIC16F631.
4.2.5.3 RA2/AN2/T0CKI/INT/C1OUT
Figure 4-3 shows the diagram for this pin. The
RA2/AN2/T0CKI/INT/C1OUT pin is configurable to
function as one of the following:
• a general purpose I/O
• an analog input for the ADC (except PIC16F631)
• the clock input for Timer0
• an external edge triggered interrupt
• a digital output from Comparator C1
FIGURE 4-3:
Data Bus
DQ
WR
WPUA
CK _Q
RD
WPUA
DQ
WR
PORTA
CK _Q
WR
TRISA
DQ
CK _Q
RD
TRISA
BLOCK DIAGRAM OF RA2
Analog⁽¹⁾
Input Mode
VDD
Weak
RABPU
C1OUT
Enable
VDD
C1OUT 1
0
I/O Pin
VSS
Analog⁽¹⁾
Input Mode
RD
PORTA
DQ
WR
IOCA
CK _Q
RD
IOCA
Interrupt-on-
Change
QD
EN
Q3
QD
EN
RD PORTA
To Timer0
To INT
To A/D Converter⁽²⁾
Note 1: ANSEL determines Analog Input mode.
2: Not implemented on PIC16F631.
© 2008 Microchip Technology Inc.
DS41262E-page 65