PIC16F631_08 Datasheet, PDF (258/306 Pages) Microchip Technology – 20-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F631/677/685/687/689/690
FIGURE 17-18: A/D CONVERSION TIMING (NORMAL MODE)
BSF ADCON0, GO
134
Q4
A/D CLK
(TOSC/2)⁽¹⁾
131
130
1 TCY
A/D Data
9
8
7
6
3
2
1
0
ADRES
OLD_DATA
NEW_DATA
ADIF
1 TCY
GO
Sample
132
Sampling Stopped
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
TABLE 17-16: A/D CONVERSION REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C ≤ TA ≤ +125°C
Param
No.
Sym.
Characteristic
Min.
Typ†
130* TAD A/D Clock Period
1.5
—
3.0*
—
A/D Internal RC
Oscillator Period
3.0*
6.0
2.0*
4.0
131 TCNV Conversion Time
—
11
(not including
Acquisition Time)⁽¹⁾
132* TACQ Acquisition Time
(2)
11.5
Max.
—
—
9.0*
6.0*
—
—
Units
Conditions
μs TOSC-based, VREF ≥ 2.5V
μs TOSC-based, VREF full range
ADCS<1:0> = 11 (RC mode)
μs At VDD = 2.5V
μs At VDD = 5.0V
TAD Set GO bit to new data in A/D Result
register
μs
5*
—
—
μs The minimum time is the amplifier
settling time. This may be used if the
“new” input voltage has not changed
by more than 1 LSb (i.e., 4.1 mV @
4.096V) from the last sampled
voltage (as stored on CHOLD).
134 TGO Q4 to A/D Clock
Start
—
TOSC/2
—
— If the A/D clock source is selected as
RC, a time of TCY is added before
the A/D clock starts. This allows the
SLEEP instruction to be executed.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: ADRESH and ADRESL registers may be read on the following TCY cycle.
2: See Table 9-1 for minimum conditions.
DS41262E-page 256
© 2008 Microchip Technology Inc.