PIC18F66K22-I Datasheet, PDF (59/550 Pages) Microchip Technology – PIC18F87K22 Family Data Sheet

PIC18F87K22 FAMILY
FIGURE 4-1:
TRANSITION TIMING FOR ENTRY TO SEC_RUN MODE
Q1 Q2 Q3 Q4 Q1
Q2 Q3 Q4 Q1 Q2 Q3
SOSCI
OSC1
1
2
3
n-1 n
Clock Transition⁽¹⁾
CPU
Clock
Peripheral
Clock
Program
Counter
PC
Note 1: Clock transition typically occurs within 2-4 TOSC.
PC + 2
PC + 4
FIGURE 4-2:
TRANSITION TIMING FROM SEC_RUN MODE TO PRI_RUN MODE (HSPLL)
Q1
Q2
Q3
Q4
Q1
Q2 Q3 Q4 Q1 Q2 Q3
SOSC
OSC1
PLL Clock
Output
TOST⁽¹⁾
CPU Clock
Peripheral
Clock
Program
Counter
PC
SCS<1:0> bits Changed
TPLL⁽¹⁾
1 2 n-1 n
Clock
Transition⁽²⁾
OSTS bit Set
PC + 2
Note 1: TOST = 1024 TOSC; TPLL = 2 ms (approx). These intervals are not shown to scale.
2: Clock transition typically occurs within 2-4 TOSC.
PC + 4
 2009-2011 Microchip Technology Inc.
DS39960D-page 59