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PIC18F66K22-I Datasheet, PDF (173/550 Pages) Microchip Technology – PIC18F87K22 Family Data Sheet
PIC18F87K22 FAMILY
TABLE 12-3: PORTB FUNCTIONS (CONTINUED)
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RB3/INT3/CTED2/
RB3
0
ECCP2/P2A
1
INT3
1
CTED2
x
ECCP2(1)
0
O
DIG LATB<3> data output.
I
TTL PORTB<3> data input; weak pull-up when RBPU bit is cleared.
I
ST External Interrupt 3 input.
I
ST CTMU Edge 2 input.
O
DIG ECCP2 compare output and ECCP2 PWM output.
Takes priority over port data.
1
I
ST ECCP2 capture input.
P2A
0
O
DIG ECCP2 Enhanced PWM output, Channel A.
May be configured for tri-state during Enhanced PWM shutdown
events. Takes priority over port data.
RB4/KBI0
RB4
0
O
DIG LATB<4> data output.
RB5/KBI1/T3CKI/
T1G
RB6/KBI2/PGC
KBI0
RB5
KBI1
T3CKI
T1G
RB6
1
I
TTL PORTB<4> data input; weak pull-up when RBPU bit is cleared.
1
I
TTL Interrupt-on-pin change.
0
O
DIG LATB<5> data output.
1
I
TTL PORTB<5> data input; weak pull-up when RBPU bit is cleared.
1
I
TTL Interrupt-on-pin change.
x
I
ST Timer3 clock input.
x
I
ST Timer1 external clock gate input.
0
O
DIG LATB<6> data output.
RB7/KBI3/PGD
KBI2
PGC
RB7
1
I
TTL PORTB<6> data input; weak pull-up when RBPU bit is cleared.
1
I
TTL Interrupt-on-pin change.
x
I
ST Serial execution (ICSP™) clock input for ICSP and ICD operations.
0
O
DIG LATB<7> data output.
Legend:
Note 1:
1
I
TTL PORTB<7> data input; weak pull-up when RBPU bit is cleared.
KBI3
1
I
TTL Interrupt-on-pin change.
PGD
x
O
DIG Serial execution data output for ICSP and ICD operations.
x
I
ST Serial execution data input for ICSP and ICD operations.
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared and in Extended Microcontroller mode.
TABLE 12-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
PORTB
RB7
RB6
RB5
LATB
LATB7
LATB6
LATB5
TRISB
TRISB7 TRISB6 TRISB5
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INTCON2
RBPU INTEDG0 INTEDG1
INTCON3
INT2IP
INT1IP
INT3IE
ODCON1 SSP1OD CCP2OD CCP1OD
Legend: Shaded cells are not used by PORTB.
RB4
LATB4
TRISB4
INT0IE
INTEDG2
INT2IE
—
RB3
LATB3
TRISB3
RBIE
INTEDG3
INT1IE
—
RB2
LATB2
TRISB2
TMR0IF
TMR0IP
INT3IF
—
Bit 1
RB1
LATB1
TRISB1
INT0IF
INT3IP
INT2IF
—
Bit 0
RB0
LATB0
TRISB0
RBIF
RBIP
INT1IF
SSP2OD
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DS39960D-page 173