PIC18F66K22-I Datasheet, PDF (33/550 Pages) Microchip Technology – PIC18F87K22 Family Data Sheet

PIC18F87K22 FAMILY
TABLE 1-4: PIC18F8XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
TQFP ^{Type Type}
Description
PORTG is a bidirectional I/O port.
RG0/ECCP3/P3A
RG0
ECCP3
P3A
5
I/O ST
Digital I/O.
I/O ST
Capture 3 input/Compare 3 output/PWM3 output.
O
—
ECCP3 PWM Output A.
RG1/TX2/CK2/AN19/
C3OUT
RG1
TX2
CK2
AN19
C3OUT
6
I/O ST
O
—
I/O ST
I Analog
O
—
Digital I/O.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX2/DT2).
Analog Input 19.
Comparator 3 output.
RG2/RX2/DT2/AN18/
C3INA
RG2
RX2
DT2
AN18
C3INA
7
I/O ST
I
ST
I/O ST
I Analog
I Analog
Digital I/O.
EUSART asynchronous receive.
EUSART synchronous data (see related TX2/CK2).
Analog Input 18.
Comparator 3 Input A.
RG3/CCP4/AN17/P3D/
C3INB
RG3
CCP4
AN17
P3D
C3INB
8
I/O ST
I/O ST
I Analog
O
—
I Analog
Digital I/O.
Capture 4 input/Compare 4 output/PWM4 output.
Analog Input 17.
ECCP3 PWM Output D.
Comparator 3 Input B.
RG4/RTCC/T7CKI/T5G/
CCP5/AN16/P1D/C3INC
RG4
RTCC
T7CKI⁽³⁾
T5G
CCP5
AN16
P1D
C3INC
10
I/O ST
O
—
I
ST
I
ST
I/O ST
I Analog
O
—
I Analog
Digital I/O.
RTCC output.
Timer7 clock input.
Timer5 external clock gate input.
Capture 5 input/Compare 5 output/PWM5 output.
Analog Input 16.
ECCP1 PWM Output D.
Comparator 3 Input C.
RG5
Legend:
Note 1:
2:
3:
4:
5:
9
See the MCLR/RG5 pin.
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
I²C = I²C™/SMBus
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
PSP is available only in Microcontroller mode.
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
 2009-2011 Microchip Technology Inc.
DS39960D-page 33