PIC18F66K22-I Datasheet, PDF (522/550 Pages) Microchip Technology – PIC18F87K22 Family Data Sheet

PIC18F87K22 FAMILY
FIGURE 31-22: EUSART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TXx/CKx
Pin
RXx/DTx
Pin
121
121
120
122
Note: Refer to Figure 31-3 for load conditions.
TABLE 31-25: EUSART/AUSART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Max Units Conditions
120 TCKH2DTV SYNC XMIT (MASTER and SLAVE)
Clock High to Data Out Valid
—
40
ns
121 TCKRF
Clock Out Rise Time and Fall Time (Master mode)
—
20
ns
122 TDTRF Data Out Rise Time and Fall Time
—
20
ns
FIGURE 31-23:
TXx/CKx
Pin
RXx/DTx
Pin
EUSART/AUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
125
126
Note: Refer to Figure 31-3 for load conditions.
TABLE 31-26: EUSART/AUSART SYNCHRONOUS RECEIVE REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Max Units
125 TDTV2CKL SYNC RCV (MASTER and SLAVE)
Data Hold before CKx  (DTx hold time)
10
—
ns
126 TCKL2DTL Data Hold after CKx  (DTx hold time)
15
—
ns
Conditions
DS39960D-page 522
 2011 Microchip Technology Inc.