PIC17C4X Datasheet, PDF (54/240 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM/ROM Microcontroller

PIC17C4X
FIGURE 9-2: RA2 AND RA3 BLOCK
DIAGRAM
Data Bus
FIGURE 9-3: RA4 AND RA5 BLOCK
DIAGRAM
Serial port input signal
Data Bus
Q
D
Q CK
RD_PORTA
(Q2)
WR_PORTA
(Q4)
Note: I/O pins have protection diodes to VSS.
RD_PORTA
(Q2)
Serial port output signals
OE = SPEN,SYNC,TXEN, CREN, SREN for RA4
OE = SPEN (SYNC+SYNC,CSRC) for RA5
Note: I/O pins have protection diodes to VDD and VSS.
TABLE 9-1: PORTA FUNCTIONS
Name
Bit0 Buffer Type
Function
RA0/INT
bit0
ST
Input or external interrupt input.
RA1/T0CKI bit1
ST
Input or clock input to the TMR0 timer/counter, and/or an external interrupt input.
RA2
bit2
ST
Input/Output. Output is open drain type.
RA3
bit3
ST
Input/Output. Output is open drain type.
RA4/RX/DT bit4
ST
Input or USART Asynchronous Receive or USART Synchronous Data.
RA5/TX/CK bit5
ST
Input or USART Asynchronous Transmit or USART Synchronous Clock.
RBPU
bit7
—
Control bit for PORTB weak pull-ups.
Legend: ST = Schmitt Trigger input.
TABLE 9-2: REGISTERS/BITS ASSOCIATED WITH PORTA
Address
Name
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
10h, Bank 0 PORTA
RBPU
—
RA5 RA4 RA3 RA2 RA1/T0CKI RA0/INT 0-xx xxxx
05h, Unbanked T0STA
INTEDG T0SE T0CS PS3 PS2 PS1
PS0
—
0000 000-
13h, Bank 0 RCSTA
SPEN RC9 SREN CREN — FERR
OERR
RC9D 0000 -00x
15h, Bank 0 TXSTA
CSRC TX9 TXEN SYNC —
—
TRMT
TX9D 0000 --1x
Legend: x = unknown, u = unchanged, - = unimplemented reads as '0'. Shaded cells are not used by PORTA.
Note 1: Other (non power-up) resets include: external reset through MCLR and the Watchdog Timer Reset.
Value on all
other resets
(Note1)
0-uu uuuu
0000 000-
0000 -00u
0000 --1u
DS30412C-page 54
© 1996 Microchip Technology Inc.