PIC17C4X Datasheet, PDF (140/240 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM/ROM Microcontroller

PIC17C4X
TLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Table Latch Write
[ label ] TLWT t,f
0 ≤ f ≤ 255
t ∈ [0,1]
If t = 0,
f → TBLATL;
If t = 1,
f → TBLATH
None
1010 01tx ffff ffff
Data from file register 'f' is written into
the 16-bit table latch (TBLAT).
If t = 1; high byte is written
If t = 0; low byte is written
This instruction is used in conjunction
with TABLWT to transfer data from data
memory to program memory.
1
1
Q2
Read
register 'f'
Q3
Execute
Q4
Write
register
TBLATH or
TBLATL
Example:
TLWT t, RAM
Before Instruction
t
=0
RAM = 0xB7
TBLAT = 0x0000
(TBLATH = 0x00)
(TBLATL = 0x00)
After Instruction
RAM =
TBLAT =
0xB7
0x00B7
(TBLATH = 0x00)
(TBLATL = 0xB7)
Before Instruction
t
=1
RAM = 0xB7
TBLAT = 0x0000
(TBLATH = 0x00)
(TBLATL = 0x00)
After Instruction
RAM =
TBLAT =
0xB7
0xB700
(TBLATH = 0xB7)
(TBLATL = 0x00)
TSTFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
If skip:
Q1
Forced NOP
Test f, skip if 0
[ label ] TSTFSZ f
0 ≤ f ≤ 255
skip if f = 0
None
0011 0011 ffff ffff
If 'f' = 0, the next instruction, fetched
during the current instruction execution,
is discarded and an NOP is executed
making this a two-cycle instruction.
1
1 (2)
Q2
Read
register 'f'
Q3
Execute
Q2
NOP
Q3
Execute
Q4
NOP
Q4
NOP
Example:
HERE TSTFSZ CNT
NZERO :
ZERO :
Before Instruction
PC = Address(HERE)
After Instruction
If CNT
=
PC
=
If CNT
≠
PC
=
0x00,
Address (ZERO)
0x00,
Address (NZERO)
DS30412C-page 140
© 1996 Microchip Technology Inc.