PIC17C4X Datasheet, PDF (122/240 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM/ROM Microcontroller

PIC17C4X
DCFSNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
If skip:
Q1
Forced NOP
Decrement f, skip if not 0
[label] DCFSNZ f,d
0 ≤ f ≤ 255
d ∈ [0,1]
(f) – 1 → (dest);
skip if not 0
None
0010 011d ffff ffff
The contents of register 'f' are decre-
mented. If 'd' is 0 the result is placed in
WREG. If 'd' is 1 the result is placed
back in register 'f'.
If the result is not 0, the next instruction,
which is already fetched, is discarded,
and an NOP is executed instead mak-
ing it a two-cycle instruction.
1
1(2)
Q2
Read
register 'f'
Q3
Execute
Q4
Write to
destination
Q2
NOP
Q3
Execute
Q4
NOP
Example:
HERE
ZERO
NZERO
DCFSNZ TEMP, 1
:
:
Before Instruction
TEMP_VALUE
=?
After Instruction
TEMP_VALUE = TEMP_VALUE - 1,
If TEMP_VALUE = 0;
PC
= Address (ZERO)
If TEMP_VALUE ≠ 0;
PC
= Address (NZERO)
GOTO
Unconditional Branch
Syntax:
[ label ] GOTO k
Operands:
0 ≤ k ≤ 8191
Operation:
k → PC<12:0>;
k<12:8> → PCLATH<4:0>,
PC<15:13> → PCLATH<7:5>
Status Affected: None
Encoding:
110k kkkk kkkk kkkk
Description:
GOTO allows an unconditional branch
anywhere within an 8K page boundary.
The thirteen bit immediate value is
loaded into PC bits <12:0>. Then the
upper eight bits of PC are loaded into
PCLATH. GOTO is always a two-cycle
instruction.
Words:
1
Cycles:
2
Q Cycle Activity:
Q1
Q2
Decode
Read literal
'k'<7:0>
Forced NOP NOP
Q3
Execute
Execute
Q4
NOP
NOP
Example:
GOTO THERE
After Instruction
PC = Address (THERE)
DS30412C-page 122
© 1996 Microchip Technology Inc.