PIC17C4X Datasheet, PDF (191/240 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM/ROM Microcontroller

PIC17C4X
Applicable Devices 42 R42 42A 43 R43 44
FIGURE 19-12: MEMORY INTERFACE READ TIMING (NOT SUPPORTED IN PIC17LC4X DEVICES)
Q1
Q2
Q3
Q4
Q1
Q2
OSC1
ALE
OE
AD<15:0>
'1'
WR
166
164
168
160
165
Addr out
150
151
167
Data in
162
163
161
Addr out
'1'
TABLE 19-12: MEMORY INTERFACE READ REQUIREMENTS (NOT SUPPORTED IN PIC17LC4X
DEVICES)
Parameter
No.
Sym
Characteristic
Min
Typ†
Max
Units Conditions
150
TadV2alL AD15:AD0 (address) valid to ALE↓ 0.25Tcy - 10
—
(address setup time)
151
TalL2adI ALE↓ to address out invalid
(address hold time)
5*
—
—
ns
—
ns
160
TadZ2oeL AD15:AD0 hi-impedance to OE↓
0*
—
—
ns
161
ToeH2adD OE↑ to AD15:AD0 driven
0.25Tcy - 15
—
—
ns
162
TadV2oeH Data in valid before OE↑
(data setup time)
35
—
—
ns
163
ToeH2adI OE↑to data in invalid (data hold time)
0
—
—
ns
164
TalH
ALE pulse width
—
0.25TCY §
—
ns
165
ToeL
OE pulse width
166
TalH2alH ALE↑ to ALE↑(cycle time)
167
Tacc
Address access time
0.5Tcy - 35 §
—
—
—
TCY §
—
—
ns
—
ns
0.75TCY - 30 ns
168
Toe
Output enable access time
(OE low to Data Valid)
—
—
0.5TCY - 45 ns
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
§
This specification ensured by design.
© 1996 Microchip Technology Inc.
DS30412C-page 191