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PIC16F1933_11 Datasheet, PDF (37/430 Pages) Microchip Technology – 28-Pin Flash-Based, 8-Bit CMOS Microcontrollers LCD Driver and nanoWatt XLP Technology
PIC16(L)F1933
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 8
400h(2) INDF0
Addressing this location uses contents of FSR0H/FSR0L to Address Data Memory
(not a physical register)
xxxx xxxx xxxx xxxx
401h(2) INDF1
Addressing this location uses contents of FSR1H/FSR1L to Address Data Memory
(not a physical register)
xxxx xxxx xxxx xxxx
402h(2) PCL
Program Counter (PC) Least Significant Byte
0000 0000 0000 0000
403h(2) STATUS
—
—
—
TO
PD
Z
DC
C
---1 1000 ---q quuu
404h(2) FSR0L
Indirect Data Memory Address 0 Low Pointer
0000 0000 uuuu uuuu
405h(2) FSR0H
Indirect Data Memory Address 0 High Pointer
0000 0000 0000 0000
406h(2) FSR1L
Indirect Data Memory Address 1 Low Pointer
0000 0000 uuuu uuuu
407h(2) FSR1H
Indirect Data Memory Address 1 High Pointer
0000 0000 0000 0000
408h(2) BSR
—
—
—
BSR<4:0>
---0 0000 ---0 0000
409h(2) WREG
Working Register
0000 0000 uuuu uuuu
40Ah(1, 2) PCLATH
—
Write Buffer for the upper 7 bits of the Program Counter
-000 0000 -000 0000
40Bh(2) INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF 0000 0000 0000 0000
40Ch
—
Unimplemented
—
—
40Dh
—
Unimplemented
—
—
40Eh
—
Unimplemented
—
—
40Fh
—
Unimplemented
—
—
410h
—
Unimplemented
—
—
411h
—
Unimplemented
—
—
412h
—
Unimplemented
—
—
413h
—
Unimplemented
—
—
414h
—
Unimplemented
—
—
415h
TMR4
Timer 4 Module Register
0000 0000 0000 0000
416h
PR4
Timer 4 Period Register
1111 1111 1111 1111
417h
T4CON
—
T4OUTPS<3:0>
TMR4ON
T4CKPS<1:0>
-000 0000 -000 0000
418h
—
Unimplemented
—
—
419h
—
Unimplemented
—
—
41Ah
—
Unimplemented
—
—
41Bh
—
Unimplemented
—
—
41Ch
TMR6
Timer 6 Module Register
0000 0000 0000 0000
41Dh
PR6
Timer 6 Period Register
1111 1111 1111 1111
41Eh
T6CON
—
T6OUTPS<3:0>
TMR6ON
T6CKPS<1:0>
-000 0000 -000 0000
41Fh
—
Unimplemented
—
—
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
Unimplemented, read as ‘1’.
 2011 Microchip Technology Inc.
Preliminary
DS41575A-page 37