PIC16F1933_11 Datasheet, PDF (35/430 Pages) Microchip Technology – 28-Pin Flash-Based, 8-Bit CMOS Microcontrollers LCD Driver and nanoWatt XLP Technology

PIC16(L)F1933
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 6
300h⁽²⁾ INDF0
Addressing this location uses contents of FSR0H/FSR0L to Address Data Memory
(not a physical register)
xxxx xxxx xxxx xxxx
301h⁽²⁾ INDF1
Addressing this location uses contents of FSR1H/FSR1L to Address Data Memory
(not a physical register)
xxxx xxxx xxxx xxxx
302h⁽²⁾ PCL
Program Counter (PC) Least Significant Byte
0000 0000 0000 0000
303h⁽²⁾ STATUS
—
—
—
TO
PD
Z
DC
C
---1 1000 ---q quuu
304h⁽²⁾ FSR0L
Indirect Data Memory Address 0 Low Pointer
0000 0000 uuuu uuuu
305h⁽²⁾ FSR0H
Indirect Data Memory Address 0 High Pointer
0000 0000 0000 0000
306h⁽²⁾ FSR1L
Indirect Data Memory Address 1 Low Pointer
0000 0000 uuuu uuuu
307h⁽²⁾ FSR1H
Indirect Data Memory Address 1 High Pointer
0000 0000 0000 0000
308h⁽²⁾ BSR
—
—
—
BSR<4:0>
---0 0000 ---0 0000
309h⁽²⁾ WREG
Working Register
0000 0000 uuuu uuuu
30Ah^{(1, 2)} PCLATH
—
Write Buffer for the upper 7 bits of the Program Counter
-000 0000 -000 0000
30Bh⁽²⁾ INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF 0000 0000 0000 0000
30Ch
—
Unimplemented
—
—
30Dh
—
Unimplemented
—
—
30Eh
—
Unimplemented
—
—
30Fh
—
Unimplemented
—
—
310h
—
Unimplemented
—
—
311h
CCPR3L
Capture/Compare/PWM Register 3 (LSB)
xxxx xxxx uuuu uuuu
312h
CCPR3H
Capture/Compare/PWM Register 3 (MSB)
xxxx xxxx uuuu uuuu
313h
CCP3CON
P3M<1:0>
DC3B<1:0>
CCP3M<1:0>
0000 0000 0000 0000
314h
PWM3CON P3RSEN
P3DC<6:0>
0000 0000 0000 0000
315h
CCP3AS
CCP3ASE
CCP3AS<2:0>
PSS3AC<1:0>
PSS3BD<1:0>
0000 0000 0000 0000
316h
PSTR3CON
—
—
—
STR3SYNC STR3D
STR3C STR3B STR3A ---0 0001 ---0 0001
317h
—
Unimplemented
—
—
318h
CCPR4L
Capture/Compare/PWM Register 4 (LSB)
xxxx xxxx uuuu uuuu
319h
CCPR4H
Capture/Compare/PWM Register 4 (MSB)
xxxx xxxx uuuu uuuu
31Ah
CCP4CON
—
—
DC4B<1:0>
CCP4M<3:0>
--00 0000 --00 0000
31Bh
—
Unimplemented
—
—
31Ch
CCPR5L
Capture/Compare/PWM Register 5 (LSB)
xxxx xxxx uuuu uuuu
31Dh
CCPR5H
Capture/Compare/PWM Register 5 (MSB)
xxxx xxxx uuuu uuuu
31Eh
CCP5CON
—
—
DC5B<1:0>
CCP5M<3:0>
--00 0000 --00 0000
31Fh
—
Unimplemented
—
—
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
Unimplemented, read as ‘1’.
 2011 Microchip Technology Inc.
Preliminary
DS41575A-page 35