PIC16F610 Datasheet, PDF (16/180 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers

PIC16F610/616/16HV610/616
TABLE 2-1: PIC16F610/616/16HV610/616 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Page
Bank 0
00h INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
xxxx xxxx 22, 113
01h TMR0
Timer0 Module’s Register
xxxx xxxx 43, 113
02h PCL
Program Counter’s (PC) Least Significant Byte
0000 0000 22, 113
03h STATUS
IRP⁽¹⁾
RP1⁽¹⁾
RP0
TO
PD
Z
DC
C
0001 1xxx 16, 113
04h FSR
Indirect Data Memory Address Pointer
xxxx xxxx 22, 113
05h PORTA
—
—
RA5
RA4
RA3
RA2
RA1
RA0 --x0 x000 31, 113
06h
—
Unimplemented
—
—
07h PORTC
—
—
RC5
RC4
RC3
RC2
RC1
RC0 --xx 00xx 40, 113
08h
—
Unimplemented
—
—
09h
—
Unimplemented
—
—
0Ah PCLATH
—
—
—
Write Buffer for upper 5 bits of Program Counter
---0 0000 22, 113
0Bh INTCON
0Ch PIR1
GIE
PEIE
T0IE
INTE
—
ADIF⁽²⁾ CCP1IF⁽²⁾ C2IF
RAIE
C1IF
T0IF
—
INTF
RAIF 0000 0000 18, 113
TMR2IF⁽²⁾ TMR1IF -000 0-00 20, 113
0Dh
—
Unimplemented
—
—
0Eh TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx 47, 113
0Fh TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx 47, 113
10h T1CON
T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 50, 113
11h TMR2⁽²⁾
Timer2 Module Register
0000 0000 53, 113
12h T2CON⁽²⁾
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 54, 113
13h CCPR1L⁽²⁾ Capture/Compare/PWM Register 1 Low Byte
XXXX XXXX 84, 113
14h CCPR1H⁽²⁾ Capture/Compare/PWM Register 1 High Byte
XXXX XXXX 84, 113
15h CCP1CON⁽²⁾ P1M1
P1M0
DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000 83, 113
16h PWM1CON⁽²⁾ PRSEN
PDC6
PDC5
PDC4
PDC3
PDC2
PDC1
PDC0 0000 0000 83, 113
17h ECCPAS⁽²⁾ ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1 PSSBD0 0000 0000 100, 113
18h
—
Unimplemented
—
—
19h VRCON
C1VREN C2VREN VRR
FVREN
VR3
VR2
VR1
VR0 0000 0000 70, 113
1Ah CM1CON0
C1ON
C1OUT
C1OE
C1POL
—
C1R
C1CH1 C1CH0 0000 -000 60, 113
1Bh CM2CON0
C2ON
C2OUT
C2OE
C2POL
—
C2R
C2CH1 C2CH0 0000 -000 61, 113
1Ch CM2CON1 MC1OUT MC2OUT
—
T1ACS C1HYS C2HYS T1GSS C2SYNC 00-0 0010 63, 113
1Dh
—
Unimplemented
—
—
1Eh ADRESH⁽²⁾ Most Significant 8 bits of the left shifted A/D result or 2 bits of right shifted result
xxxx xxxx 78, 113
1Fh ADCON0⁽²⁾
ADFM
VCFG
CHS3
CHS2
CHS1
CHS0 GO/DONE ADON 0000 0000 76, 113
Legend:
Note 1:
2:
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
IRP and RP1 bits are reserved, always maintain these bits clear.
PIC16F616/16HV616 only.
DS41288C-page 14
Preliminary
© 2007 Microchip Technology Inc.