PIC16F610 Datasheet, PDF(119/180 Page) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers

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PIC16F610 Datasheet, PDF (119/180 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers

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PIC16F610/616/16HV610/616

FIGURE 12-8:

INT PIN INTERRUPT TIMING

OSC1

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

CLKOUT (3)

(4)

INT pin

INTF flag

(1)

(INTCON reg.)

(1)

(5)

GIE bit

(INTCON reg.)

Interrupt Latency (2)

INSTRUCTION FLOW

Instruction

Fetched

Inst (PC)

PC + 1

Inst (PC + 1)

PC + 1

0004h

Inst (0004h)

0005h

Inst (0005h)

Instruction

Executed

Inst (PC â 1)

Inst (PC)

Dummy Cycle Dummy Cycle

Inst (0004h)

Note 1: INTF flag is sampled here (every Q1).

2: Asynchronous interrupt latency = 3-4 TCY. Synchronous latency = 3 TCY, where TCY = instruction cycle time. Latency

is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.

3: CLKOUT is available only in INTOSC and RC Oscillator modes.

4: For minimum width of INT pulse, refer to AC specifications in Section 15.0 âElectrical Specificationsâ.

5: INTF is enabled to be set any time during the Q4-Q1 cycles.

TABLE 12-6: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

INTCON

IOCA

PIR1

PIE1

Legend:

Note 1:

GIE

PEIE

T0IE

INTE

RAIE

T0IF

INTF

RAIF

IOCA5 IOCA4 IOCA3 IOCA2

IOCA1

IOCA0

ADIF(1) CCP1IF(1) C2IF

C1IF

TMR2IF(1)

TMR1IF

ADIE(1) CCP1IE(1) C2IE

C1IE

TMR2IE(1) TMR1IE

x = unknown, u = unchanged, â = unimplemented read as â0â, q = value depends upon condition.

Shaded cells are not used by the interrupt module.

PIC16F616/16HV616 only.

Value on

POR, BOR

0000 0000

--00 0000

-000 0-00

Value on

all other

Resets

0000 0000

--00 0000

-000 0-00

Preliminary

DS41288C-page 117

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