RFPIC12F675 Datasheet, PDF (12/136 Pages) Microchip Technology – FLASH-Based Microcontroller with ASK/FSK Transmitter

rfPIC12F675
2.2.2.4 PIE1 Register
The PIE1 register contains the interrupt enable bits, as
shown in Register 2-4.
Note: Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
REGISTER 2-4:
PIE1 — PERIPHERAL INTERRUPT ENABLE REGISTER 1 (ADDRESS: 8Ch)
R/W-0 R/W-0
U-0
EEIE
ADIE
—
bit 7
U-0
R/W-0
U-0
—
CMIE
—
U-0
R/W-0
—
TMR1IE
bit 0
bit 7
bit 6
bit 5-4
bit 3
bit 2-1
bit 0
EEIE: EE Write Complete Interrupt Enable bit
1 = Enables the EE write complete interrupt
0 = Disables the EE write complete interrupt
ADIE: A/D Converter Interrupt Enable bit 
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
Unimplemented: Read as ‘0’
CMIE: Comparator Interrupt Enable bit
1 = Enables the comparator interrupt
0 = Disables the comparator interrupt
Unimplemented: Read as ‘0’
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
DS70091B-page 12
Preliminary
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