RFPIC12F675 Datasheet, PDF (108/136 Pages) Microchip Technology – FLASH-Based Microcontroller with ASK/FSK Transmitter

rfPIC12F675
FIGURE 13-11: rfPIC12F675 A/D CONVERSION TIMING (SLEEP MODE)
BSF ADCON0, GO
134
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
132
(TOSC/2 + TCY)⁽¹⁾
131
130
9
8
76
3
OLD_DATA
SAMPLING STOPPED
2
1
1 TCY
0
NEW_DATA
1 TCY
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
TABLE 13-10: rfPIC12F675 A/D CONVERSION REQUIREMENTS (SLEEP MODE)
Param
No.
Sym
Characteristic
Min
130
TAD A/D Clock Period
1.6
3.0*
130
TAD A/D Internal RC
Oscillator Period
3.0*
2.0*
131
TCNV Conversion Time
—
(not including
Acquisition Time)⁽¹⁾
132
TACQ Acquisition Time (Note 2)
Typ†
—
—
6.0
4.0
11
11.5
Max Units
Conditions
—
s VREF 3.0V
—
s VREF full range
ADCS<1:0> = 11 (RC mode)
9.0* s At VDD = 2.5V
6.0* s At VDD = 5.0V
—
TAD
— s
5*
—
— s The minimum time is the amplifier
settling time. This may be used if
the “new” input voltage has not
changed by more than 1 LSb (i.e.,
4.1 mV @ 4.096V) from the last
sampled voltage (as stored on
CHOLD).
134
TGO Q4 to A/D Clock
Start
— TOSC/2 + TCY —
— If the A/D clock source is selected
as RC, a time of TCY is added
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
* These parameters are characterized but not tested.
† Data in ‘Typ’ column is at 5.0V, 25C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: ADRES register may be read on the following TCY cycle.
2: See Section 7.1 for minimum conditions.
DS70091B-page 108
Preliminary
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