MLX71122_16 Datasheet, PDF (36/59 Pages) Melexis Microelectronic Systems – 300 to 930MHz FSK/FM/ASK Receiver

MLX71122
300 to 930MHz FSK/FM/ASK Receiver
Datasheet
The last two operating modes can be used to accelerate the start-up time of the circuit after periods of
silence. With RO and bias only, the start-up time of the reference oscillator (RO) can be circumvented. RO
and biasing consume not as much current as the whole receiver. With Synthesizer only the full PLL is
already working and locked. Current consuming blocks as the LNA, the IF-filter and the FSK-demodulator
are turned off in this state. The last mode is useful if the receiver has to listen frequently.
3.8. Multi Functional Output
The Multi Functional Output (pin 23) can be used to read out the control register settings or to make other
internal signals available at this pin. The output is controlled by the bits MFO in register R3 (see 4.1.4).
The most important selections are:
 0000 – Z-State
 0001 – SPI-out
 0010 – Logic-0
 0011 – Logic-1
 0100 – RO-out
 0101 – IF-out
 1000 – LD-out
 1011 – CCO-out
MFO pin is in high impedance mode
MFO pin is digital serial output for data of registers (default in SPI-mode)
MFO pin is pulled to ground
MFO pin is pulled to VCC
MFO pin is buffered, analogue output of RO frequency (default in ABC-mode)
MFO pin is buffered, analogue output of IF2 signal after the IF-filter
MFO pin represents lock state of PLL
MFO pin represents CCO output
Z-State, Logic-0 and Logic-1 can be used to provide digital control signals to other circuits on the PCB. In
state RO-out a 10MHz clock frequency is available at MFO, e.g. for driving a microcontroller. At IF-out pin
MFO provides the IFF output, amplified by a factor of 5 (unloaded). In this case the output resistance is
about 610. The IF-out mode can be used for checking the IFF characteristics or for further signal
processing, e.g. to add an external limiting amplifier and demodulator. With the LD-out setting the state of
the PLL can be read out. All other selections are for test purposes. The CCO-out option can be used to
check the ratio between the internal CCO and the IF filter frequency.
3.9. SPI Description
3.9.1. General
Serial programming interface (SPI) mode can be activated by choosing SPISEL = 1 (e.g. at positive supply
voltage V_CC). In this mode, the input pins 17, 18 and 19 are used as a 3-wire unidirectional serial bus
interface (SDEN, SDTA, SCLK). The internal latches contain all user programmable variables including
counter settings, mode bits etc.
In addition the MFO pin can be programmed as an output (see section 4.1.4) in order to read data from the
internal latches and it can be used as an output for different test modes as well.
At each rising edge of the SCLK signal, the logic value at the SDTA terminal is written into a shift register.
The programming information is taken over into internal latches with the rising edge of SDEN. Additional
leading bits are ignored, only the last bits are serially clocked into the shift register. A normal write
operation shifts 16 bits into the SPI, a normal read operation shifts 4 bits into the SPI and reads additional
12 bits from the MFO pin. If less than 12 data bits are shifted into SDTA during the write operation then the
control register may contain invalid information.
REVISION 014 – AUGUST, 2016
390 10 71122 01
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