MLX71122_16 Datasheet, PDF (21/59 Pages) Melexis Microelectronic Systems – 300 to 930MHz FSK/FM/ASK Receiver

MLX71122
300 to 930MHz FSK/FM/ASK Receiver
Datasheet
3.2. PLL Frequency Synthesizer
The MLX71122 contains an integer-N PLL frequency synthesizer. The reference frequency f_R is derived from
a stable crystal reference oscillator.
Phase-Frequency
Detector
f _RO
f_R
VCC
External
Loop Filter
LF
f _VCO
Reference Reference
Oscillator
Divider
f _FB
Charge
Pump
Feedback
Divider
Voltage Controlled
Oscillator
Fig. 4: Integer-N PLL Frequency Synthesizer Topology
The locked state of the PLL is defined by the following relations:
f _RO
R
 f_R
 f_PFD
 f_FB

f _VCO
N _tot

f _VCO
NPA
.
(14)
In this formula the total PLL feedback divider ratio is called N_tot. The synthesized output frequency f_VCO can
be changed by reprogramming the reference divider or the feedback divider according to
  f_VCO

N _tot
f _RO
R

NPA
f_{RO .}
R
(15)
The R counter is used to set the channel spacing. Different channels can be selected by changing the total
feedback divider ratio.
REVISION 014 – AUGUST, 2016
390 10 71122 01
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