MLX71122_16 Datasheet, PDF (18/59 Pages) Melexis Microelectronic Systems – 300 to 930MHz FSK/FM/ASK Receiver

MLX71122
300 to 930MHz FSK/FM/ASK Receiver
Datasheet
f _LO1

f _RO
R
(N  P

A)

f_PFD (N  P

A)

f _PFD

N _tot
(6)
Since
LO2 
LO1
4 or 8
,the
channel
frequency step,
f_CH, ,is
not
equal
to
the
phase-frequency
detector
(PFD)
frequency f_PFD.
For LO2 high-side injection, the channel step size f_CH is given by
f_CH

f _RO
R
N _LO2 
N _LO2
1

f
PFD
N _LO2  1
N _LO2
,
(7)
while the following equation is valid for LO2 low-side injection:
f_CH

f _RO
R
N _LO2 
N _LO2
1

f
PFD
N _LO2  1
N _LO2
.
(8)
3.1.1. Calculation of Counter Settings
Frequency planning and the selection of the MLX71122’s PLL counter settings are straightforward and can
be laid out on the following procedure.
For this type of counter, it is necessary that A  N .
For discrete frequency tuning without equal channel steps:
Find a combination of R, A and N to obtain f_VCO from equations (1), (2), (3) or (4). A large value for R is not
always necessary to get high resolution tuning. A combination of N_TOT and R can almost always be found
which will give sufficient frequency accuracy even with a high PLL reference frequency. For example,
433.92MHz can be tuned with a 10MHz crystal with R  17 and N_TOT  979 with an 8.3kHz error.
For equal channel steps without gaps:
It is necessary that N  P , it follows (NP  A)  P² , so N  32 and NP  A  N_tot  1024 .
(9)
REVISION 014 – AUGUST, 2016
390 10 71122 01
Page 18 of 59