MAX11008 Datasheet, PDF (7/67 Pages) Maxim Integrated Products – Dual RF LDMOS Bias Controller with Nonvolatile Memory

Dual RF LDMOS Bias Controller with
Nonvolatile Memory
I²C HIGH-SPEED-MODE TIMING CHARACTERISTICS (Notes 14, 15, Figure 4)
(DV_DD = +2.7V to +5.25V, AV_DD = +4.75V to +5.25V, V_DGND = V_AGND = 0, external V_REFADC = +2.5V, external V_REFDAC = +2.5V,
C_REF = 0.1µF, T_A = -40°C to +85°C, unless otherwise noted.)
PARAMETER
Serial Clock Frequency
Setup Time (Repeated) START
Condition
Hold Time (Repeated) START
Condition
SCL Pulse-Width Low
SCL Pulse-Width High
Data Setup Time
Data Hold Time
SCL Rise Time
SCL Rise Time
SCL Fall Time
SDA Rise Time
SDA Fall Time
Setup Time for STOP Condition
Capacitive Load for Each Bus Line
Pulse Width of Spikes Suppressed
by the Input Filter
SYMBOL
CONDITIONS
f_SCL
t_SU:STA
t_HD:STA
t_LOW
t_HIGH
t_SU:DAT
t_HD:DAT
t_RCL
t_RCL1
t_FCL
t_RDA
t_FDA
t_SU:STO
C_B
t_SP
(Note 17)
After a repeated START
condition and after an
acknowledge bit
(Note 20)
(Note 21)
C_B = 100pF max
MIN
MAX
0
3.4
160
160
160
80
10
4
70
10
40
10
80
10
40
10
80
10
80
160
100
0
10
C_B = 400pF
MIN MAX
0
1.7
160
UNITS
MHz
ns
160
ns
320
ns
120
ns
10
ns
4
150
ns
20
80
ns
20
160
ns
20
80
ns
20
160
ns
20
160
ns
160
ns
400
ns
0
10
ns
MISCELLANEOUS TIMING CHARACTERISTICS (Note 15)
(DV_DD = +2.7V to +5.25V, AV_DD = +4.75V to +5.25V, V_DGND = V_AGND = 0, external V_REFADC = +2.5V, external V_REFDAC = +2.5V,
C_REF = 0.1µF, T_A = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL
Minimum Time to Wait After a Write
Command Before Reading Back
Data from the Same Location
t_RDBK (Note 22)
CNVST Active-Low Pulse Width in
ADC Clock Mode 01
t_CNV01
CNVST Active-Low Pulse Width in
ADC Clock Mode 11 to Initiate a
Temperature Conversion
t_CNV11
CNVST Active-Low Pulse Width in
ADC Clock Mode 11 for ADCIN1/2
Acquisition
t_ACQ11A
ADC Power-Up Time (External
Reference)
t_APUEXT
ADC Power-Up Time (Internal
Reference)
t_APUINT
CONDITIONS
MIN TYP MAX UNITS
1
µs
20
ns
20
ns
1.5
µs
1.1
µs
70
µs
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