MAX11008 Datasheet, PDF (42/67 Pages) Maxim Integrated Products – Dual RF LDMOS Bias Controller with Nonvolatile Memory

Dual RF LDMOS Bias Controller with
Nonvolatile Memory
4) The resulting LUT pointer value is bound-limited to
ensure it fits within the corresponding LUT. Negative
pointer values are limited to zero, and pointer values
that extend beyond the range of the LUT are limited
to the last entry.
5) The final LUT pointer value is calculated by shifting
SOT to the left by 5 bits and then adding it to the
current LUT pointer value. If no linear interpolation
(INT = 00) is to be performed, the resulting LUT
pointer value is equal to the absolute EEPROM
address from which the LUT data is retrieved. If lin-
ear interpolation is to be performed (INT = 01, 10, or
11), the two LUT addresses that are closest to the
resulting LUT pointer value and their corresponding
data values are entered into the following equation
to calculate the interpolated data value that is used
in the V_{GATE_} calculation:
Interpolated
Data
=
DATA1 +
⎛ PTR − ADD1 ⎞
⎝⎜ ADD2 − ADD1⎠⎟
x (DATA2 −
DATA1)
Table 5. Temperature/APC LUT
Configuration Register
DATA
BITS
D[15:10]
D[9:8]
D[7:6]
D[5:3]
D[2:0]
BIT
NAME
POFF
INT
PSIZE
TSIZE
SOT
RESET
STATE
FUNCTION
000000 POFF bits.
00 ^{Interpolation degree select bits.}
See Table 5b.
00 ^{LUT pointer size bit. See Table}
5a.
000 LUT size bit. See Table 5c.
000
Start of table address bits. See
Table 5d.
Table 5a. LUT Pointer Sizes and Offset
Ranges
PSIZE
00
LUT POINTER SIZE
5-bit pointer (access up
to 32 data locations)
POFF OFFSET RANGE*
-32 to +31
01 ^{6-bit pointer (access up}
to 64 data locations)
-32 to +31
10
7-bit pointer (access up
to 128 data locations)
-64 to +62 (in steps of 2)
11
8-bit pointer (access up
to 256 data locations)
-128 to +124 (in steps of 4)
*POFF is either a negative or positive number. When POFF is
negative its value is represented in two’s complement format.
where PTR is the calculated LUT pointer value with
fractional bits, ADD1 and ADD2 are the two LUT
addresses closest to the value of PTR, and DATA1 and
DATA2 are the LUT data values stored at ADD1 and
ADD2.
LUT Pointer Example 1 (No Interpolation)
POFF = 001000 (offset of +8).
INT = 00 (no interpolation/LUT pointer does not have
any fractional bits).
PSIZE = 00 (5-bit LUT pointer not including any frac-
tional bits).
TSIZE = 001 (LUT has 32 data locations).
SOT = 010 (LUT starts at EEPROM address 40 hex).
Table 5b. Fractional Bits Added to LUT
Pointer for Linear Interpolation
INT
NUMBER OF FRACTIONAL BITS ADDED TO
LUT POINTER
00
0
01
1 ≥ 1:2 interpolation
10
2 ≥ 1:4 interpolation
11
3 ≥ 1:8 interpolation
Table 5c. Selectable LUT Sizes
TSIZE
000
001
010
011
100
101
110
111
LUT SIZE
Unused
Table size of 32 data locations
Table size of 64 data locations
Table size of 96 data locations
Table size of 128 data locations
Table size of 160 data locations
Table size of 192 data locations
Unused
Table 5d. Selectable LUT Starting
Addresses
SOT
000
001
010
011
100
101
110
111
STARTING ADDRESS IN EEPROM (HEX)
Unused
Unused
0x40
0x60
0x80
0xA0
0xC0
0xE0
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