MAX11270 Datasheet, PDF (35/46 Pages) Maxim Integrated Products – Integrated PGA

MAX11270
24-Bit, 10mW, 130dB SNR, 64ksps Delta-Sigma
ADC with Integrated PGA
Control 3 Register (Read/Write)
The CTRL3 register is an 8-bit read/write register. The byte written to the CTRL3 register determines the operation of
the modulator output.
BIT
B07
B06
B05
B04
B03
B02
B01
B00
BIT NAME
—
—
ENMSYNC MODBITS DATA32
—
—
—
DEFAULT
0
1
1
0
0
0
0
1
BIT DEFAULT LABEL
FUNCTION
00
1
—
Reserved bit
01
0
—
Reserved bit
02
0
—
Reserved bit
03
0
DATA32
32-bit data mode bit. Set DATA32 = 1 to read 32 bits of data at DOUT. Set DATA32 = 0 for 24-
bit data reads at DOUT. See the Data Register section.
04
0
MODBITS
Modulator output mode enable bit. Set MODBITS = 1 to enable the modulator output on
DOUT and GPIO1. Set MODBITS = 0 for standard data output mode on DOUT.
Modulator sychronization pulse enable bit. Set ENMSYNC = 1 to enable the synchronization
05
1
ENMSYNC pulse for modulator output mode. Set ENMSYNC = 0 to disable the synchronization pulse for
modulator output mode.
06
1
07
0
—
Reserved bit
—
Reserved bit
Control 4 Register (Read/Write)
The CTRL4 register is an 8-bit read/write register. The byte written to the CTRL4 register determines whether the GPIOs
are inputs or outputs, and whether they are enabled.
BIT
B07
B06
B05
B04
B03
B02
B01
B00
BIT NAME
—
DIR3
DIR2
DIR1
—
DIO3
DIO2
DIO1
DEFAULT
0
0
0
0
1
1
1
1
BIT DEFAULT LABEL
FUNCTION
00
1
DIO1
01
1
DIO2 ^{GPIO bit values. When GPIO is configured as an output, set the DIO bits = 0 to set the}
associated GPIO output as a 0. When GPIO are configured as inputs, these bits indicate the pin
02
1
DIO3 _status.
03
1
—
04
0
DIR1 _{GPIO direction bits. Set the DIR bits = 0 to configure the associated GPIO as an input. The}
05
0
DIR2 _{value returned by a read of the DIO bit is the value being driven on the pin. Set the DIR bits =}
06
0
DIR3 ^{1 to configure the associated GPIO as an output. The GPIO is driven to the logic value of the}
07
0
—
associated DIO bit.
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