LTC3589_1 Datasheet, PDF (6/46 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at T_A = 25°C (Note 2). V_IN = PV_IN1 = PV_IN2 = PV_IN3 = PV_IN4 = V_{IN_LDO2} = V_{IN_LDO34}
= DV_DD = 3.8V. All regulators disabled unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP MAX UNITS
LDO Regulator 4 (LDO4)
V_{IN_LDO34}
I_{VIN_LDO34}
I_VIN
V_LDO4
V_{IN_LDO34} Input Range
V_{IN_LDO34} Quiescent Current
V_{IN_LDO34} Shutdown Current
Enabled V_IN Quiescent Current
LDO 4 Output Voltage
Regulator Enabled
Regulator Disabled
I_LDO4 = 1mA, L2DTV2[6:5] = 00
L2DTV2[6:5] = 01
L2DTV2[6:5] = 10
L2DTV2[6:5] = 11
l 2.35
V_IN
V
l
14
24
µA
l
0
1
µA
l
50
85
µA
l 2.716
2.8 2.884
V
l 2.425
2.5
2.575
V
l 1.746
1.8
1.854
V
l 3.201
3.3 3.399
V
LD04 Line Regulation
I_LDO4
I_{LDO4_SC}
V_DROP4
LDO4 Load Regulation
LDO4 Available Output Current
LDO4 Short-Circuit Current Limit
LDO4 Dropout Voltage (Note 4)
Enable Inputs
I_LDO4 =1mA, V_INLDO4 = 2.7V to 5.5V,
V_OUT = 1.8V
0.01
%/V
I_LDO4 = 1mA to 250mA
0.05
%
l 250
mA
300
450
600
mA
I_LDO4 = 200mA, V_LDO4 = 3.3V
I_LDO4 = 200mA, V_LDO4 = 1.8V
120
160
mV
190
250
mV
V_{ENx_THR}
Threshold Rising, All Enables Low
V_{ENx_THR2}
V_{ENx_THF2}
Threshold Rising, Any Enable High
Threshold Falling, Any Enable High
R_ENX
Input Pull-Down Resistance
VSTB, PWR_ON Inputs
l
0.8
1.2
V
l
0.5
0.530
V
l 0.420 0.45
V
4.5
MΩ
V_{VSTB_THR}
V_{VSTB_THF}
R_VSTB
V_{PWR_ONTHR}
V_{PWR_ONTHF}
R_{PWR_ON}
I²C Port
VSTB Pin Threshold Rising
VSTB Pin Threshold Falling
Pull-Down Resistence
PWR_ON Pin Threshold Rising
PWR_ON Pin Threshold Falling
Pull-Down Resistence
l
0.8
1.2
V
l 0.4
0.7
V
4.5
MΩ
l
0.8
1.2
V
l 0.4
0.7
V
4.5
MΩ
DV_DD
I_DVDD
V_{DVDD_UVLO}
ADDRESS
DV_DD Input Supply Voltage
DV_DD Quiescent Current
DV_DD UVLO Level
LTC3589 Device Address – Write
LTC3589 Device Address – Read
SCL/SDA = 0kHz
l 1.6
5.5
V
0.5
µA
0.8
V
01101000
01101001
V_IH SDA, SCL
V_IL SDA, SCL
I_IHSCx I_ILSCx
V_OL SDA
f_SCL
t_BUF
SDA and SCL Input Threshold Rising
SDA and SCL Input Threshold Falling
SDA and SCL Input Current
SDA Output Low Voltage
SCL Clock Operating Frequency
Bus Free Time Between Stop and Start
Condition
SDA = SCL = 0V to 5.5V
I_SDA = 3mA
70
–250
l
1.3
%DV_DD
30 %DV_DD
250
nA
0.4
V
400
kHz
µs
t_{HD_STA}
t_{SU_STA}
Hold Time After (Repeated) Start Condition
Repeated Start Condition Set-Up Time
0.6
µs
0.6
µs
3589fb
6