LTC3589_1 Datasheet, PDF (21/46 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589
OPERATION
Soft-Start
Soft-start is accomplished by gradually increasing the
input reference voltage on each step-down switching
regulator from 0V to the dynamic reference DAC output
level at a rate of 0.8V/ms. This allows each output to
rise slowly, helping minimize inrush current required to
charge up the regulator output capacitor. A soft-start cycle
occurs whenever a regulator is enabled either initially or
while powering up following a fault condition. A soft-start
cycle is not triggered by a change of operating modes or
a dynamic voltage slew. During soft-start the converter is
forced to pulse-skipping mode regardless of the settings
in the SCR1 command register.
Table 5. Step-Down Switching Regulator 2 Command Register
Settings
COMMAND
VALUE SETTING
REGISTER[BIT]
SCR1[3-2]
00* Pulse-Skipping Mode
01 Burst Mode Operation
10 Forced Continuous Mode
OVEN[1]
0* Disable
1 Enable
SCR2[1]
0* Wait for Output Below 300mV Before Enable
1 Enable immediately
VCCR[3]
0* Select Register B2DTV1 (V1) Reference
1 Select Register B2DTV2 (V2) Reference
VCCR[2]
1 Initiate Dynamic Voltage Slew
VRRCR[3-2]
00 Reference Slew Rate = 0.88mV/µs
01 Reference Slew Rate = 1.75mV/µs
10 Reference Slew Rate = 3.5mV/µs
11* Reference Slew Rate = 7mV/µs
B2DTV1[5]
0* Force PGOOD Low When Slewing
1 Normal PGOOD Operation When Slewing
B2DTV1[4-0] 11001* DAC Dynamic Target Voltage V1
B2DTV2[4-0] 11001* DAC Dynamic Target Voltage V2
B2DTV2[5]
0* 2.25MHz Switching Frequency
1 1.125MHz Switching Frequency
B2DTV2[6]
0* Switch on Clock Phase 1
1 Switch on Clock Phase 2
B2DTV2[7]
0* Shutdown Regulator 2 Normally
1 Keep Regulator 2 Alive
* Denotes Default Power-On Value
Switching EMI Control
The step-down switching regulators contain new pat-
ent pending circuitry to limit the edge rate of the switch
nodes SW1, SW2, and SW3. This new circuitry controls
the transition of the switch node over a period of a few
nanoseconds, significantly reducing radiated EMI and
conducted supply noise while maintaining high efficiency.
Since slowing the slew rate of the switch nodes causes
efficiency loss, the slew rate of the step-down switching
regulators is adjustable using the I²C command register
B1DTV1 bits 6 and 7. Optimize efficiency or EMI as neces-
sary with four different slew rate settings. The power-on
default is the fastest slew rate, highest efficiency setting.
Table 6. Step-Down Switching Regulator 3 Command Register
Settings
COMMAND
VALUE SETTING
REGISTER[BIT]
SCR1[5-4]
00* Pulse-Skipping Mode
01 Burst Mode Operation
10 Forced Continuous Mode
OVEN[2]
0* Disable
1 Enable
SCR2[2]
0* Wait for Output Below 300mV Before Enable
1 Enable Immediately
VCCR[5]
0* Select Register B3DTV1 (V1) Reference
1 Select Register B3DTV2 (V2) Reference
VCCR[4]
1 Initiate Dynamic Voltage Slew
VRRCR[5-4]
00 Reference Slew Rate = 0.88mV/µs
01 Reference Slew Rate = 1.75mV/µs
10 Reference Slew Rate = 3.5mV/µs
11* Reference Slew Rate = 7mV/µs
B3DTV1[5]
0* Force PGOOD Low When Slewing
1 Normal PGOOD Operation When Slewing
B3DTV1[4-0] 11001* DAC Dynamic Target Voltage V1
B3DTV2[4-0] 11001* DAC Dynamic Target Voltage V2
B3DTV2[5]
0* 2.25MHz Switching Frequency
1 1.125MHz Switching Frequency
B3DTV2[6]
0* Switch on Clock Phase 1
1 Switch on Clock Phase 2
B3DTV2[7]
0* Shutdown Regulator 3 Normally
1 Keep Regulator 3 Alive
* Denotes Default Power-On Value
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