LTC3589_1 Datasheet, PDF (44/46 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589
PACKAGE DESCRIPTION
UJ Package
40-Lead Plastic QFN (6mm × 6mm)
(Reference LTC DWG # 05-08-1728 Rev Ø)
0.70 ±0.05
4.42 ±0.05
4.42 ±0.05
6.50 ±0.05
5.10 ±0.05
4.50 ±0.05
(4 SIDES)
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PACKAGE OUTLINE
6.00 ± 0.10
(4 SIDES)
PIN 1 TOP MARK
(SEE NOTE 6)
0.75 ± 0.05
R = 0.10
TYP
4.50 REF
(4-SIDES)
R = 0.115
TYP
39 40
4.42 ±0.10
PIN 1 NOTCH
R = 0.45 OR
0.35 × 45°
CHAMFER
0.40 ± 0.10
1
2
4.42 ±0.10
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING IS A JEDEC PACKAGE OUTLINE VARIATION OF (WJJD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
44
(UJ40) QFN REV Ø 0406
0.25 ± 0.05
0.50 BSC
BOTTOM VIEW—EXPOSED PAD
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