LTC3589_1 Datasheet, PDF (1/46 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589
8-Output Regulator with
Sequencing and I²C
FEATURES
n _{Triple I}²_{C Adjustable High Efficiency Step-Down DC/}
DC Converters: 1.6A, 1A, 1A
n _{High Efficiency 1.2A Buck-Boost DC/DC Converter}
n _{Triple 250mA LDO Regulators}
n _{Pushbutton ON/OFF Control with System Reset}
n _{Flexible Pin-Strap Sequencing Operation}
n _I²_{C and Independent Enable Control Pins}
n _{Power Good and Reset Outputs}
n _{Dynamic Voltage Scaling and Slew Rate Control}
n _{Selectable 2.25MHz or 1.12MHz Switching Frequency}
n _{Always-Alive 25mA LDO Regulator}
n _{8µA Standby Current}
n _{40-Pin 6mm × 6mm × 0.75mm QFN}
APPLICATIONS
n _{Handheld Instruments and Scanners}
n _{Portable Industrial Devices}
n _{Automotive Infotainment}
n _{Medical Devices}
n _{High End Consumer Devices}
n _{Multirail Systems}
n _{Supports Freescale i.MX, Marvell PXA and Other}
Application Processors
DESCRIPTION
The LTC^®3589 is a complete power management solu-
tion for ARM and ARM-based processors and advanced
portable microprocessor systems. The device contains
three synchronous step-down DC/DC converters for
core, memory and SoC rails, a synchronous buck-boost
regulator for I/O at 3.3V to 5V, and three 250mA LDO
regulators for low noise analog supplies. An I²C serial
port is used to control regulator enables, output voltage
levels, dynamic voltage scaling and slew rate, operating
modes and status reporting.
Regulator start-up is sequenced by connecting outputs to
enable pins in the desired order or via the I²C port. System
power-on, power-off and reset functions are controlled by
pushbutton interface, pin inputs, or I²C interface.
The LTC3589 supports i.MX, PXA and OMAP proces-
sors with eight independent rails at appropriate power
levels. Other features include interface signals such
as the VSTB pin that toggles between programmed run
and standby output voltages on up to four rails simulta-
neously. The device is available in a low profile 40-pin
6mm × 6mm exposed pad QFN package.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
TYPICAL APPLICATION
V_IN 2.7V TO 5.5V
VRTC 1.2V
AT 25mA
MEMORY
0.9V TO 1.2V
AT 250mA
ANALOG 1.8V
AT 250mA
1.8V, 2.5V,
2.8V, 3.3V
AT 250mA
VIN
LDO1_STDBY
1µF
1µH
SW1
LDO2 ^LTC3589
SW2
1.5µH
1µF
LDO3
1µF
1.5µH
SW3
1µF ³
7
LDO4
I²C
ENABLES
PWR_ON
ON
GND
SW4AB
SW4CD
2.7µH
BB_OUT
WAKE
4
STATUS
3589 TA01a
V_CORE
0.6V TO 1.2V
22µF ^{AT 1.6A}
V_SRAM
0.9V TO 1.8V
22µF ^{AT 1A}
22µF
V_SOC
0.625V TO 1.25V
AT 1A
I/O
3.3V AT 1.2A
OR 5V AT 1A
22µF
Start-Up Sequence
I/O
WAKE
(1V/DIV)
0.5V/DIV
V_SRAM
ANALOG
V_SOC
MEMORY
V_CORE
500µs/DIV
3589 TA01b
3589fb
1