LTC3589_1 Datasheet, PDF (28/46 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589
OPERATION
Table 13 shows command register and feedback divider
settings to enable slewing step-down switching regulator 1
between 1.2V and 1V in 70µs. The voltage ramp rate
control register bits VRRCR[1:0] are set to 01 which
selects a ramp rate of 1.75mV/µs at the DAC output.
The slew rate at the regulator output is a function of the
feedback resistor divider gain. In this example, the slew
is equal to 1.75 • (1 + 301/499) = 2.8mV/µs. Therefore, a
slew of 200mV will take 70µs. To initiate a change from
1.2V to 1V write 11 to voltage change control register bits
VCCR[1:0]. VCCR[1] selects target register B1DTV2 to
set the regulator reference input to 0.625V. VCCR[0] set
to 1 initiates the dynamic slew to go to the new voltage.
To slew back to 1.2V write 01 to command register bits
VCCR[1:0].
Table 13. Dynamic Slewing Example for Step-Down Switching
Regulator 1
COMMAND
REGISTER
V_OUT =1.2V V_OUT =1V
VRRCR[1:0]
01
01
Dynamic Slew Rate
VCCR[1]
0
1
Select DTV
B1DTV1[4:0]
B1DTV2[4:0]
11111
10101
11111
10101
Resistor Divider Shown
in Figure 3
R1 = 301kΩ
R2 = 499kΩ
PUSHBUTTON OPERATION
State Event Diagram
Figure 5 shows the LTC3589 pushbutton state diagram.
Upon first power application to V_IN an internal power-on
reset circuit puts the pushbutton into power-down (PDN)
state and initiates a one second timer. Status pin RSTO is
pulled LOW until one second is timed out and the always-
alive LDO1 has indicated power good status. After the
one second interval the pushbutton circuit will transition
to the power-off (POFF) state. The pushbutton will not
leave the POFF state and enter the power-up state (PUP)
until ON is held LOW for at least 400ms (PB400ms) or
until PWR_ON is activated by the PWR_ON pin. When the
controller enters the PUP state the open-drain WAKE pin
releases HIGH. The WAKE pin is typically used to enable
the first regulator in a start-up sequence. The pushbutton
state will stay in PUP for five seconds before transition-
ing to the power-on (PON) state. Before leaving PUP, the
PWR_ON pin must be brought HIGH by the application
to indicate that the system rails are correct. If PWR_ON
is not active at the end of five seconds the pushbutton
controller will continue directly through PON to the power-
down (PDN) state and pull the WAKE pin down. Three
events will cause the pushbutton to leave the PON state:
1) lowering the PWR_ON pin, 2) forcing a hard reset by
holding the ON pin LOW for five seconds, and 3) a fault
condition is detected. Fault conditions are low V_IN, device
over temperature, or extended undervoltage of one of the
regulator outputs. All regulator enables, the ON input, and
PWR_ON signals are inhibited for one second while in
the PDN state. After one second in PDN the pushbutton
controller returns to POFF.
PUP
PB400ms OR
PWR_ON
5 SEC
POFF
PON
1 SEC
POR
FAULT OR
PWR_ON
PDN
3589 F05
Figure 5. Pushbutton Controller State Diagram
PBSTAT Operation
PBSTAT goes LOW 50ms after the initial pushbutton ap-
plication (ON LOW) and will stay LOW for a minimum of
50ms. PBSTAT will go HIGH coincident with ON going
HIGH unless ON goes HIGH before the 50ms minimum
on-time.
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