LTC3589_1 Datasheet, PDF (27/46 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589
OPERATION
SLEWING DAC REFERENCE OPERATION
Controlling the DAC References
The three LTC3589 step-down switching regulators and
linear regulator LDO2 have programmable DAC reference
inputs. Each DAC is programmable from 0.3625V to 0.75V
in 12.5mV steps:
V_OUT

= _1+

R1^
R2_
•
(0.3625 + BxDTVx
•
0.0125)(V)
The DAC references may be commanded to independently
slew between two voltages at one of four selectable slew
rates. Table 12 summarizes the command registers used
to control slewing DAC operation.
Table 12. Slewing DAC Command Register Control Summary
COMMAND
REGISTER[BIT]
FUNCTION
VCCR[0], VCCR[2],
VCCR[4], VCCR[6]
Voltage Change Control Register
G0 / Slew
Write a 1 to Initiate a Slew to the Voltage
Selected in VCCR[1], VCCR[3], VCCR[5],
VCCR[7] Respectively.
Bits are Reset to 0 at the End of the Slew
Operation.
VCCR[1], VCCR[3],
VCCR[5], VCCR[7]
Voltage Change Control Register
Dynamic Target Select
Write a 0 to Select Voltage V1 Stored in
Registers B1DTV1[4-0], B2DTV1[4-0],
B3DTV1[4-0], L2DTV1[4-0].
Write a 1 to Select Voltage V2 in
Registers B1DTV2[4-0], B2DTV2[4-0],
B3DTV2[4-0], L2DTV2[4-0].
B1DTV1[4-0], B2DTV1[4-0], Dynamic Target Voltage 1
B3DTV1[4-0], L2DTV1[4-0] _{Five Bits Corresponding to V1 Output}
from Each DAC.
B1DTV1[5], B2DTV1[5],
B3DTV1[5], L2DTV1[5]
PGOOD Mask
Write a 1 to Continue Normal PGOOD
Operation When Slewing.
Write a 0 to Force PGOOD to Pull Low
During Slew.
B1DTV2[4-0], B2DTV2[4-0], Dynamic Target Voltage 2
B3DTV2[4-0], L2DTV2[4-0] _{Five Bits Corresponding to V2 Output}
from Each DAC.
VRRCR[1-0], VRRCR[3-2],
VRRCR[5-4], VRRCR[7-6]
Voltage Ramp Rate Control
Two Bits That Set the DAC Output Slew
Rate for Step-Down Switching Regulator
and LDO2.
Setting and Slewing the DAC Outputs
The 5-bit word in dynamic target voltage command reg-
isters B1DTV1, B2DTV1, B3DTV1, and L2DTV1 programs
reference voltage V1. The 5-bit word in command regis-
ters B1DTV2, B2DTV2, B3DTV2, and L2DTV2 programs
reference voltage V2. A resistor divider network on the
output and feedback pins of the regulators set their
output voltage.
A 0 or 1 to the odd bits of voltage change control register
VCCR selects DAC output voltages V1 or V2, respectively. A
slew of the DAC is initiated by writing a 1 to an even bit of
register VCCR. The DAC output will slew to either voltage,
V1 or V2, as selected by the odd bits of register VCCR.
Slew begins when the I²C STOP condition is detected. At
the end of the slewing operation the GO bits in command
register VCCR are cleared.
The slew rate for each regulator is set in the ramp rate
control register VRRCR. Each DAC has independent output
voltage registers, voltage register select, and slew rate and
start controls. The regulators do not have to be enabled
to change the DAC outputs.
The VSTB pin is used to set the DAC controlled output rails
to a low power standby condition. When VSTB is driven
HIGH, all four of the DAC references will immediately slew
to V2. To use VSTB to set the rails to standby voltage,
select V1 for normal rail voltages and V2 for standby rail
voltages. Drive VSTB high to immediately slew all the
DAC outputs to V2. When VSTB is driven LOW, the DAC
outputs will slew to V1.
The default power-up value of all the dynamic target voltage
registers is 11001 corresponding to a DAC output volt-
age of 0.675V. The DTV registers may be reprogrammed
prior to initiating a power-up sequence or at any time for
dynamic slewing.
When a step-down switching regulator output is slewing
down its mode is automatically switched to forced continu-
ous to enable the regulator to sink current. When LDO2 is
slewing down, a 2.5k pull-down is connected to its output.
3589fb
27