LTC3589_1 Datasheet, PDF (39/46 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589
OPERATION
Table 16. LTC3589 Command Register Table
REG NAME B[7]
B[6]
B[5]
B[4]
B[3]
B[2]
B[1]
0x32 L2DTV1 Keep-Alive
Mode:
Unused
PGOOD
Mask:
LDO 2 Feedback Reference Input (V1)
0 = Normal
Shutdown
1 = Keep-Alive
0 = PGOOD
Low When
Slewing
1 = PGOOD
Not Changed
When
Slewing.
00000 = 362.5mV
11001 = 675mV
11111 = 750mV
12.5mV Step Size
0x33 L2DTV2 LDO4 Control
MODE:
0 = LDO4
Enable with
EN_LDO34
1 = LDO4
Enable with
OVEN[6]
LDO4 Output Voltage:
00 = 2.8V
01 = 2.5V
10 = 1.8V
11 = 3.3V
LDO 2 Feedback Reference Input (V2)
00000 = 362.5mV
11001 = 675mV
11111 = 750mV
12.5mV Step Size
B[0]
DEFAULT
0001 1001
0001 1001
Table 17. LTC3589 Read-Only Status Register Table
REG NAME B[7]
B[6]
B[5]
0x02 IRQSTAT Thermal
Limit Hard
Shutdown
Occurred
Near Thermal
Limit
Undervoltage
Hard
Shutdown
Occurred
0x13 PGSTAT LDO4 Status: LDO3 Status: LDO2 Status:
B[4]
Near
Undervoltage
Limit
Buck_Boost
Status:
0 = V_OUT Low
1 = V_OUT
Good
0 = V_OUT Low
1 = V_OUT
Good
0 = V_OUT Low 0 = V_OUT Low
1 = V_OUT Good 1 = V_OUT Good
B[3]
B[2]
PGOOD
Unused
Timeout Hard
Shutdown
Occurred
Step-Down
Switching
Regulator 3
Status:
Step-Down
Switching
Regulator 2
Status:
B[1]
Unused
Step-Down
Switching
Regulator 1
Status:
B[0]
Unused
LDO1 Status:
0 = V_OUT Low
1 = V_OUT
Good
0 = V_OUT Low 0 = V_OUT Low 0 = V_OUT Low
1 = V_OUT Good 1 = V_OUT Good 1 = V_OUT Good
THERMAL CONSIDERATIONS AND BOARD LAYOUT
Printed Circuit Board Power Dissipation
In order to ensure optimal performance and the ability
to deliver maximum output power to any regulator, it is
critical that the exposed ground pad on the backside of
the LTC3589 package be soldered to a ground plane on
the board. The exposed pad is the only GND connection
for the LTC3589. Correctly soldered to a 2500mm² ground
plane on a double sided 1oz copper board the LTC3589
has a thermal resistance (θ_JA) of approximately 34°C/W.
Failure to make good thermal contact between the exposed
pad on the backside of the package and an adequately
sized ground plane will result in thermal resistances far
greater than 34°C/W.
To ensure the junction temperature of the LTC3589 die
does not exceed the maximum rated limit and to prevent
overtemperature faults, the power output of the LTC3589
must be managed by the application. The total power
dissipation in the LTC3589 is approximated by summing
the power dissipation in each of the switching regulators
and the LDO regulators.
The power dissipation in a switching regulator is esti-
mated by:
P_{D(SWX )}
= (V_OUTX
•
I _OUTX ) •
100 – Eff
100
Where V_OUTX is the programmed output voltage, I_OUTX
is the load current and Eff is the % efficiency that can
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