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LTC3811_15 Datasheet, PDF (38/48 Pages) Linear Technology – High Speed Dual, Multiphase Step-Down DC/DC Controller
LTC3811
APPLICATIONS INFORMATION
The maximum power dissipation in the sense resistor
will be:
PR(SENSE) = 22.9A2 • 0.0015Ω = 0.79W
To ensure that the maximum current can be delivered
over all of the power component and IC tolerances, the
maximum sense voltage for the LTC3811 is chosen to be
50mV. This is programmed by connecting the RNG pin
to INTVCC.
Due to the use of a 400nH inductor and 500kHz opera-
tion, the magnitude of the inductive voltage drop across
the sense resistor should be calculated and compared to
the maximum sense voltage (50mV). First calculate the
nominal switch on-time:
tON
=
VOUT
VIN • f
=
1.5V
12V • 500kHz
=
250ns
The inductor ΔIL/dt is therefore:
ΔIL
dt
=
6.7A
250ns
=
26.8A
μs
The Panasonic sense resistor has a typical parasitic series
inductance (ESL) of 0.5nH, meaning that the inductive
voltage drop across the resistor is:
VL(SENSE)
= ESL •
ΔIL
dt
= 0.5nH •
26.8A
μs
= 13.4mV
The ESL/R time constant for the sense resistor is
therefore:
τ
=
ESL
RSENSE
= 333ns
The sense pins need an RC filter with the same time constant
in order for the waveform at the SENSE+ and SENSE– pin
to accurately represent the inductor current. Choosing a
value of 1000pF for the filter capacitor, the total resistance
should therefore be 333Ω. Split between the SENSE+
and SENSE– pins, each resistor should be 165Ω. These
components should be placed adjacent to the SENSE+ and
SENSE– pins on the LTC3811, and the PCB traces from
the 165Ω filter resistors should be minimum width and
run parallel to each other all the way to the sense resistor
location on the board.
38
The power MOSFETs chosen for this application are the
Renesas RJK0305DPB (top) and RJK0301DPB (bottom).
The upper MOSFET, which is optimized for low switching
losses, has a typical RDS(ON) of 10mΩ at VGS = 4.5V, a
total gate charge of 8nC, and a minimum BVDSS of 30V.
The bottom MOSFET, which is zero-voltage switched and
is optimized for low on-resistance, has a typical RDS(ON)
of 3mΩ at VGS = 4.5V, a total gate charge of 32nC, and a
minimum BVDSS of 20V.
From the datasheet of the RJK0305DPB upper MOSFET,
the Miller capacitance is calculated to be:
CMILLER
=
ΔQG
ΔVDS
=
2nC
12V
= 167pF
Assuming a top MOSFET junction temperature of 75°C,
δ = 0.25 and the power dissipated in this MOSFET is:
( ) PMAIN
=
VOUT
VIN
• IMAX2 • RDS(ON) •
1+ δ
+
VIN2
•
IMAX
2
T
•
RDR
• CMILLER
•
⎡
⎣⎢⎢ VINTVCC
1
– VTH(MIN)
+
1⎤
VTH(MIN)
⎥
⎦⎥
•
f
PMAIN
=
1.5V
12V
•
15A2
•
0.01•
(1+
0.25)
+
12V2
•
15A
2
•
2Ω
•
167pF
•
⎡
⎣⎢6V
1
–
1V
+
1⎤
1V ⎦⎥
•
500kHz
PMAIN = 0.351W + 0.216W = 0.567W
For the synchronous MOSFET the power dissipation is:
( ) PSYNC
=
VIN
– VOUT
VIN
• IMAX2
• RDS(ON) •
1+ δ
PMAIN
=
12V – 1.5V
12V
•
15A2
•
0.003
•
(1+
0.25)
= 0.738W
To determine the RMS current rating of the input capacitor,
we need to first determine the minimum and maximum
duty cycle. For an output voltage of 1.5V and an input range
of 4.5V to 14V, the duty cycle range is 12.5% to 33.3%.
We then use Figure 17 to determine the percentage of
3811f