LTC3811_15 Datasheet, PDF (34/48 Pages) Linear Technology – High Speed Dual, Multiphase Step-Down DC/DC Controller

LTC3811
APPLICATIONS INFORMATION
moves from DRV_CC to ground. The resulting dQ/dt is
a current out of DRV_CC that is typically much larger
than the control circuit current. In continuous mode,
I_GATECHG = f(Q_T + Q_B), where Q_T and Q_B are the gate
charges of the topside and bottom side MOSFETs.
Supplying DRV_CC and INTV_CC power through the
EXTV_CC switch input from an output-derived source
will scale the V_IN current required for the driver and
control circuits by a factor of (Duty Cycle)/(Efficiency).
For example, in a 20V input to 2.5V output application,
40mA of DRV_CC current results in approximately 5mA
of V_IN current. This reduces the mid-current efficiency
loss from 10% or more (if the driver was powered
directly from V_IN) to only a few percent.
3. I²R losses are predicted from the DC resistances of
the fuse (if used), MOSFET, inductor, current sense
resistor, and input and output capacitor ESR. In
continuous mode the average output current flows
through L and R_SENSE, but is “chopped” between the
topside MOSFET and the synchronous MOSFET. If the
two MOSFETs have approximately the same R_DS(ON),
then the resistance of one MOSFET can simply be
summed with the resistances of L, R_SENSE and ESR to
obtain I²R losses. For example, if each R_DS(ON) = 5mΩ,
R_L = 1mΩ, R_SENSE = 1.5mΩ and R_ESR = 4mΩ (sum
of both input and output capacitance losses), then the
total resistance is 16mΩ. This results in losses ranging
from 5.6% to 8.4% as the output current increases
from 10A to 15A for a 2.5V output. Efficiency varies
as the inverse square of V_OUT for the same external
components and output power level. The combined
effects of increasingly lower output voltages and higher
currents required by high performance digital systems
is not doubling but quadrupling the importance of loss
terms in the switching regulator system!
4. Transition losses apply only to the topside MOSFET(s),
and become significant only when operating at high
input voltages (typically 15V or greater). Transition
losses can be estimated from:
( ) ^{Translation Loss =}
V_IN
2 I_MAX
2
• R_DR
• C_MILLER
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
34
10% efficiency degradation in portable systems. It is very
important to include these “system” level losses during
the design phase. The internal battery and fuse resistance
losses can be minimized by making sure that C_IN has ad-
equate charge storage and very low ESR at the switching
frequency. A 25W supply will typically require a minimum of
20μF to 40μF of capacitance having a maximum of 20mΩ to
50mΩ of ESR. The LTC3811 2-phase architecture typically
halves this input capacitance requirement over competing
solutions. Other losses including Schottky conduction
losses during dead-time and inductor core losses generally
account for less than 1% total additional loss.
Feedback Loop Compensation
The LTC3811 incorporates a peak current mode control
topology. Peak current mode control provides excellent
line and load transient response, and inherently provides
the best possible phase-to-phase current sharing in
multiphase applications.
The LTC3811 incorporates a true operational error ampli-
fier in the feedback loop, enabling the user the flexibility
to place poles and zeros at well defined frequencies in
the transfer function, thereby optimizing the loop’s AC
response.
The control-to-output transfer function has a pole at the
origin in order to provide DC regulation, and a pole due
to the load resistance and capacitance at:
f_P(LOAD)
=
2π
1
• R_L
• C_L
The output decoupling capacitor ESR contributes a zero
to the transfer function at:
f_Z(ESR)
=
2π
1
• ESR
•
C_L
The transfer function also has a mathematical double pole at
half the switching frequency due to the sampling nature of
current mode control, although the pole-splitting behavior
of the LTC3811’s internal slope compensation reduces the
phase shift for frequencies below f_SW/2.
For most systems, the simple 2-pole, single-zero response
of a Type-II compensation network (shown in Figure 23)
3811f