LTC3811_15 Datasheet, PDF (12/48 Pages) Linear Technology – High Speed Dual, Multiphase Step-Down DC/DC Controller

LTC3811
PIN FUNCTIONS
FB1, FB2: Error Amplifier Feedback Input Pins. The error
amplifiers in the LTC3811 are high bandwidth, low offset
true operational amplifiers. If differential remote sensing
is not used, the FB pin should be connected to a resistor
divider from the output of the power supply to SGND with
the resistors placed close to the IC. In normal regulation the
voltage at the FB pin is 0.6V. If remote sensing is used the
FB pin should be connected to a resistor divider from the
output of the differential amplifier to SGND. For multiphase
operation, connecting the FB pin of a slave error amplifier
to INTV_CC will disable the output of that amplifier, allowing
amplifier outputs to be connected in parallel.
INTV_CC: Supply Pin for All of the Internal Low Voltage
Analog and Digital Control Circuitry, Electrically Isolated
from the DRV_CC Pin. The INTV_CC supply is normally derived
by connecting a low value resistor (1Ω) from the output
of the LDO (DRV_CC) to INTV_CC and connecting a 0.1μF low
ESR (X5R or better) ceramic bypass capacitor connected
from INTV_CC to SGND. This RC decoupling configuration
prevents gate driver switching noise from coupling into the
analog control circuitry. The INTV_CC decoupling capacitor
should be connected as close as possible to the IC pins.
MODE/SYNC: Mode Control and PLL Synchronization
Input. This pin programs the operating mode and serves
as the sync input to the internal phase-lock loop (PLL).
Connecting this pin to INTV_CC forces continuous operation
(regardless of the load current) and connecting it to SGND
allows discontinuous mode operation at light load. Applying
an external clock between 175kHz and 900kHz will cause
the operating frequency to synchronize to the clock.
PGND: Power Supply Return Path for the Bottom Side
Gate Drivers, Connected to the Sources of the Lower
Power MOSFETs. PGND should also be connected to the
negative terminal of the DRV_CC decoupling capacitor as
close as possible to the IC. PGND is electrically isolated
from the SGND pin. The Exposed Pad on the bottom of
the QFN package is PGND.
PGOOD1, PGOOD2: An Open-Drain NMOS Power Good
Output. This output turns on, pulling down the PGOOD
pin, when the FB voltage falls out of a ±10% regulation
window. The PGOOD monitor circuit contains a 130μs
nuisance filter to prevent short duration UV and OV tran-
sients from triggering the PGOOD output on, and a 30μs
filter for the recovery from a fault condition.
PHASEMODE (QFN Only): The PHASEMODE pin voltage
programs the phase relationship between the channel 1 and
channel 2 rising TG signals, as well as the phase relation-
ship between the channel 1 TG signal and CLKOUT.
PLL/LPF: Frequency Set and PLL Lowpass Filter Input.
When not synchronized, this pin can be used to program
the operating frequency. Connecting this pin to SGND
forces 250kHz operation and connecting it to INTV_CC
forces 750kHz operation. Connecting the PLL/LPF pin to
a voltage between 0.4V and 2V forces 500kHz operation.
When synchronizing to an external clock, this pin serves
as the lowpass filter input for the PLL. A series resistor and
capacitor connected from PLL/PLF to SGND compensate
the PLL feedback loop.
RNG1, RNG2: The voltage at this pin programs the sense
voltage range for peak current mode control. Connecting
this pin to SGND programs a peak sense voltage of 24mV
and connecting it to INTV_CC programs a peak sense volt-
age of 50mV. Alternatively, the sense voltage range can be
linearly programmed by programming the RNG pin from
0.6V to 2V with a divider from INTV_CC to SGND.
RUN1, RUN2: On/Off Input Pin for Each Controller.
SENSE1⁺, SENSE2⁺: Positive Inputs to the Current Com-
parators and Voltage Positioning g_m Amplifier. The COMP
pin voltage programs the current comparator offset in
order to set the peak current trip threshold. The LTC3811
is capable of sensing current using a discrete resistor in
series with the inductor, or by indirectly sensing the volt-
age drop across the DCR of the inductor. See Applications
Information for more details.
3811f
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