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LTC3811_15 Datasheet, PDF (11/48 Pages) Linear Technology – High Speed Dual, Multiphase Step-Down DC/DC Controller | |||
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LTC3811
PIN FUNCTIONS
BG1, BG2: High Current Gate Driver Outputs for the
N-Channel Lower Power MOSFETs.
BOOST1, BOOST2: Bootstrapped Supply Inputs to the
Topside Floating Drivers. A low ESR (X5R or better) ceramic
bypass capacitor should be connected between the BOOST
pin and the SW pin as close as possible to the IC.
CLKOUT: A Digital Output Used for Daisy-Chaining Multiple
LTC3811 ICs in Multiphase Systems. The PHASEMODE
pin voltage controls the phase relationship between the
channel 1 TG signal and CLKOUT.
COMP1, COMP2: Error Ampliï¬er Output Voltages. The
error ampliï¬ers in the LTC3811 are high bandwidth, low
offset true operational ampliï¬ers that have low output
impedance. As a result, the outputs of two active error
ampliï¬ers cannot be directly connected together! For
multiphase operation, connecting the FB pin of a slave
error ampliï¬er to INTVCC will disable the output of that
ampliï¬er. Multiphase operation can then be achieved by
connecting all of the COMP pins together and using one
channel as the master and all of the others as slaves. The
FB and COMP pins are also used for compensating the
control loop of the converter.
CSOUT (QFN Only): Output of the Voltage Positioning
gm Ampliï¬er. This pin allows the user to program the
amount of voltage droop in the output voltage at high
load current. The output of the voltage positioning gm
ampliï¬er is a bi-directional current proportional to the
(SENSE+ â SENSEâ) voltages for both channels. The
gm is internally ï¬xed to 5mS. Forcing the gm ampliï¬er
output current through a low value external resistor will
program the amount of voltage droop seen at the output.
See Applications Information for more details regarding
voltage positioning.
DIFF/IN+: Remote Sense Differential Ampliï¬er Positive
Input. A low offset, high bandwidth operational ampliï¬er
is conï¬gured with four precision 80k resistors for a non-
inverting gain of one. This pin is normally connected to the
positive terminal of the decoupling capacitor at the load.
DIFF/INâ: Remote Sense Differential Ampliï¬er Negative
Input. This pin is normally connected to the negative
terminal of the decoupling capacitor at the remote load.
The DIFF/IN+ and DIFF/INâ PCB traces should be routed
as close as possible and parallel to each other from the
IC to the output capacitor.
DIFF/OUT: Remote Sense Differential Ampliï¬er Output
Voltage, Conï¬gured for a Noninverting Gain of One. The
voltage at the DIFF/OUT pin is normally connected through
an external resistor divider to the FB pin of one channel.
The bottom of the divider should be connected to the
SGND pin of the IC.
DRVCC: Output of the Internal 6V Low Dropout Regulator
(LDO), Supply Pin for the Bottom Gate Drivers and Output
of the PMOS EXTVCC Switch. A low ESR (X5R or better)
4.7μF ceramic bypass capacitor should be connected
between the DRVCC pin and the PGND pin, as close as
possible to the IC.
Exposed Pad (QFN Only): The Exposed Pad of the QFN
Leadframe is PGND.
EXTVCC: External Power Supply Input to an Internal PMOS
Power Switch Connected Between EXTVCC (Drain) and
DRVCC (Source). This pin allows an external supply to be
used for the high current gate drivers, thereby reducing
power dissipation in the LDO and increasing efï¬ciency.
When EXTVCC exceeds 4.5V (rising), the high current
PMOS switch turns on and shorts EXTVCC to DRVCC,
bypassing the internal LDO. See Applications Information
for more details.
3811f
11
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