DG-IRMCK203 Datasheet, PDF (38/67 Pages) International Rectifier – Application Developer’s Guide

IRMCK203 Application Developer’s Guide
4.2 Write Register Definitions
4.2.1 PwmConfig Register Group (Write Registers)
Byte
Offset
0xC
0xD
0xE
0xF
0x44
0x45
0x51
7
Gatekill
Sns
(W)
TwoPhs
Pwm
(W)
6
SPARE
5
Gate
SnsL
(W)
Bit Position
4
3
2
1
Gate
SnsU
SyncSns BrakeSns
SD
(W)
(W)
TwoPhs
Type
(W)
PwmPeriod (LSBs)
(W)
PwmConfig
(W)
PwmPeriod (MSBs)
(W)
PwmDeadTm
(W)
ModScl (LSBs)
(W)
ModScl (MSBs)
(W)
PwmGuardBand
(W)
PwmConfig Write Register Map
0
SPARE
Field
Name
SD
BrakeSns
SyncSns
GateSnsU
GateSnsL
GatekillSns
PwmPeriod
PwmConfig
TwoPhsType
TwoPhsPwm
Access
(R/W)
W
W
W
W
W
W
W
W
W
W
Field Description
Shutdown control output to IR2137.
Logic Sense for BRAKE signal output to gate driver IC. 0 = Active
low, 1 = active high.
Logic Sense for PWM SYNC signal output to microprocessor. 0 =
Active low, 1 = active high.
Upper IGBT gate sense. 1 = active high gate control, 0 = active
low gate control.
Lower IGBT gate sense. 1 = active high gate control, 0 = active
low gate control.
GATEKILL signal sense. 1 = active high GATEKILL, 0 = active low
GATEKILL.
PWM Carrier period. Actual PWM carrier period is 2 * (PwmPeriod
+ 1) * (System Clock Period).
PWM Configuration. 0 = Asymmetrical center aligned PWM, 1 =
Symmetrical Center aligned PWM.
Used only for two-phase PWM modulation mode:
0 = Type 1 2-phase PWM
1 = Type 2 2-phase PWM
Selects PWM modulation mode:
0 = Enable 3-phase space vector PWM modulation
1 = Enable 2-phase space vector PWM modulation
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