DG-IRMCK203 Datasheet, PDF (14/67 Pages) International Rectifier – Application Developer’s Guide

IRMCK203 Application Developer’s Guide
2.6 Fault Handling
The IRMCK203 system has built-in drive fault and protection features. Table 8 summarizes the types of drive fault
conditions.
Fault
Overcurrent
/Overtemperature
Overvoltage
Overspeed
Overrun
Low voltage
Zero speed
Startup retry failure
Phase loss
Status indication on
Host Register
Interface
FltStatus Read
Register, field
GatekillFlt = 1
FltStatus Read
Register, field
OvFlt = 1
FltStatus Read
Register, field
OvrSpdFlt = 1
FltStatus Read
Register, field
ExecTmFlt = 1
FltStatus Read
Register, field
LvFlt = 1
FltStatus Read
Register, field
ZeroSpdFlt = 1
FltStatus Read
Register, field
RetryFlt = 1
FltStatus Read
Register, field
PhsLossFlt = 1
Description
Overcurrent or overtemperature occurred. The IGBT gate driver
(IR2136) disables gate drive outputs, momentarily latches a fault
condition and asserts GATEKILL to the IRMCK203. This activates the
fault latch inside the IRMCK203.
Overvoltage of the DC bus occurred. Only the fault latch inside the
IRMCK203 is activated.
The speed of the motor exceeded the maximum speed. Only the fault
latch inside the IRMCK203 is activated.
The computation of algorithm exceeded the selected PWM carrier
frequency period. Only the fault latch inside the IRMCK203 is
activated.
The bus voltage dropped below a certain level (determined by the dc
bus feedback scaling). Only the fault latch inside the IRMCK203 is
activated.
When speed is less than MinSpd/2 (half minimum speed) for a
continuous period of 2 seconds, the zero speed fault occurs. Only the
fault latch inside the IRMCK203 is activated.
After a configured number of start-up failures (determined by register
NumRetries in the StartupRetrial write register group), this fault
occurs. Only the fault latch inside the IRMCK203 is activated.
This fault indicates that the drive to motor phase connection may be
loose. Only the fault latch inside the IRMCK203 is activated.
Table 8. Drive Fault Conditions
When any drive fault occurs, the PWM output is disabled and the gate signals from the IRMCK203 device are
negated. This condition remains latched until Fault_Clear action is undertaken by the user. Fault_Clear, a level
sensitive signal event, can be initiated either through the FltClr bit in the FaultControl host register or the FLTCLR
discrete I/O external interface pin. For more information about the FaulControl and FaultStatus registers, refer to
Sections 4.2.6 and 4.3.4, respectively.
When a fault occurs, the LED indication is as follows: REDLED = 1, GREENLED = 0.
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