HMP8170 Datasheet, PDF (30/33 Pages) Intersil Corporation – NTSC/PAL Video Encoder

HMP8170, HMP8171, HMP8172, HMP8173
Typical Performance Curves (Continued)
FIGURE 24. H SYNC JITTER IN A FRAME (PAL)
Application Information
PCB Considerations
A PCB board with a minimum of 4 layers is recommended,
with layers 1 and 4 (top and bottom) for signals and layers 2
and 3 for power and ground. The PCB layout should
implement the lowest possible noise on the power and
ground planes by providing excellent decoupling. PCB trace
lengths between groups of V_AA and GND pins should be as
short as possible.
Component Placement
The optimum layout places the HMP817x at the edge of the
PCB and as close as possible to the video output connector.
External components should be positioned as close as
possible to the appropriate pin, ideally such that traces can
be connected point to point. Chip capacitors are
recommended where possible, with radial lead ceramic
capacitors the second-best choice.
Traces containing digital signals should not be routed over,
under, or adjacent to the analog output traces to minimize
crosstalk. If this is not possible, coupling can be minimized
by routing the digital signals at a 90 degree angle to the
analog signals. The analog output traces should also not
cross over or under the V_CC power plane to maximize high-
frequency power supply rejection.
Power and Ground Planes
A common ground plane for all devices, including the
HMP817x, is recommended. However, placing the encoder
on an electrically connected GND peninsula reduces noise
levels. All GND pins on the HMP817x must be connected to
the ground plane. Typical power and ground planes are
shown in Figure 26.
30
FIGURE 25. SCH PHASE MEASUREMENT
The small connection between the ground areas should be
made wide enough so that most of the encoders digital
inputs can be routed over or under it. It is especially
important that the CLK and CLK2 signals cross through the
connection.
The HMP817x should have its own power plane that is
isolated from the common power plane of the board, with a
gap between the two power planes of at least 1/8 inch. All
V_AA pins of the HMP817x must be connected to this isolated
power plane.
The HMP817x power plane should be connected to the
board’s normal V_CC power plane at a single point though a
low-resistance ferrite bead, such as a Ferroxcube
5659065-3B, Fair-Rite 2743001111, or TDK BF45-4001. The
ferrite bead provides resistance to switching currents,
improving the performance of HMP817x. A single, large
capacitor should also be used between the HMP817x power
plane and the ground plane to control low-frequency power
supply ripple.