ISL6265C_10 Datasheet, PDF (22/27 Pages) Intersil Corporation – Multi-Output Controller with Integrated MOSFET Drivers for AMD SVI Capable Mobile CPUs

ISL6265C
-------------^R----^O-----^C----^S----^E----^T-------------
R_OCSET + R_BIAS
=
V_{-----O----C----S----E----T--}
1.17 V
(EQ. 15)
The resistor values must also meet the R_BIAS
requirement that the total series resistance to ground
equal 117kΩ. An OC condition must be sustained for
100µs before action is taken by the controller in response
to the OC fault.
A short-circuit OC loop is also active based on the same
sense elements outlined above with a threshold set to
2.25x the OCSET threshold set. The controller takes
immediate action when this fast OC fault is detected.
NORTHBRIDGE OC DETECTION
Northbridge OC sensing is achieved via r_DS(ON) sensing
across the lower MOSFET. An internal 10µA current
source develops a voltage across R_{OCSET_NB}, which is
compared with the voltage developed across the low-side
MOSFET as measured at the PHASE pin. When the
voltage drop across the MOSFET exceeds the voltage
drop across the resistor, an OC event occurs. The
OCSET_NB resistor is selected based on the relationship
in Equation 16.
R_OCSETNB
=
-^I-^O-----^C-----^â‹---^r--^D-----^S----⁽--^O----^N----⁾
10 μ A
(EQ. 16)
Where I_OC is the OC trip level selected for the
Northbridge application and r_DS(ON) is the drain-source
ON-resistance of the lower MOSFET.
OC FAULT RESPONSE
When an OC fault occurs on any combination of outputs,
both Core and Northbridge regulators shutdown and the
driver outputs are tri-stated. The PGOOD signal
transitions low indicating a fault condition. The controller
will not attempt to restart the regulators and the user
must toggle either EN or VCC to clear the fault condition.
Overvoltage Protection
The ISL6265C monitors the individual Core and
Northbridge output voltages using differential remote
sense amplifiers. The ISL6265C features a severe
overvoltage (OV) threshold of 1.8V. If any of the outputs
exceed this voltage, an OV fault is immediately triggered.
PGOOD is latched low and the low-side MOSFETs of the
offending output(s) are turned on. The low-side MOSFETs
will remain on until the output voltage is pulled below
0.85V at which time all MOSFETs are turned off. If the
output again rises above 1.8V, the protection process
repeats. This offers protection against a shorted
high-side MOSFET while preventing output voltage from
ringing below ground. The OV is reset by toggling EN low.
OV detection is active at all times that the controller is
enabled including after one of the other faults occurs so
that the processor is protected against high-side MOSFET
leakage while the MOSFETs are commanded off.
Undervoltage Protection
Undervoltage protection is independent of the OC limit. A
fault latches if any of the sensed output voltages are less
than the VID set value by a nominal 295mV for 205µs.
The PWM outputs turn off both Core and Northbridge
internal drivers and PGOOD goes low.
General Application Design
Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to design a
single-phase power converter. It is assumed that the
reader is familiar with many of the basic skills and
techniques referenced in the following section. In
addition to this guide, Intersil provides complete
reference designs that include schematics, bills of
materials, and example board layouts.
Selecting the LC Output Filter
The output inductor and output capacitor bank form a
low-pass filter responsible for smoothing the pulsating
voltage at the phase node. The output filter also must
support the transient energy required by the load until
the controller can respond. Because it has a low
bandwidth compared to the switching frequency, the
output filter limits the system transient response. The
output capacitors must supply or sink load current while
the current in the output inductors increases or
decreases to meet the demand.
The duty cycle of an ideal buck converter is a function of
the input and the output voltage. This relationship is
written as Equation 17:
D
=
-^V-----^O---
V_IN
(EQ. 17)
The output inductor peak-to-peak ripple current is
written as Equation 18:
I_P-P
=
V_-----O-----•_--(_---1_{-----–----}D_-----)
f_SW • L
(EQ. 18)
For this type of application, a typical step-down DC/DC
converter has an I_P-P of 20% to 40% of the maximum
DC output load current. The value of I_P-P is selected
based upon several criteria such as MOSFET switching
loss, inductor core loss, and the resistive loss of the
inductor winding. The DC copper loss of the inductor can
be estimated by Equation 19:
P_COPPER = I_LOAD2 • DCR
(EQ. 19)
Where I_LOAD is the converter output DC current.
The copper loss can be significant so attention must be
given to the DCR selection. Another factor to consider
when choosing the inductor is its saturation
characteristics at elevated temperature. A saturated
inductor could cause destruction of circuit components as
well as nuisance OCP faults.
A DC/DC buck regulator must have output capacitance
C_O into which ripple current I_P-P can flow. Current I_P-P
develops a corresponding ripple voltage V_P-P across C_O,
which is the sum of the voltage drop across the capacitor
22
FN6976.1
July 28, 2010