DT28F160S570 Datasheet, PDF (36/51 Pages) Intel Corporation – 5 VOLT FlashFile™ MEMORY

28F160S5/28F320S5
E
Start
Write 60H,
Block/Device Address
Write 01H,
Block/Device Address
Read Status Register
0
SR.7 =
1
Full Status
Check if Desired
Bus
Operation
Write
Write
Command
Comments
Set Lock-Bit Setup
Data = 60H
Addr = X
Set Block Lock-Bit Data = 01H
Confirm
Addr = X
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Repeat for subsequent lock-bit set
Full status check can be done after each lock-bit set operation or
a sequence of lock-bit set
Write FFH after the last lock-bit set operation to place device in
array mode.
Set Lock-Bit Complete
FULL STATUS CHECK PROCEDURE
Read Status Register
Data (See Above)
1
SR.3 =
VoltageRange Error
0
SR. 1 =
1
Device Protect Error
0
SR.4,5 =
0
SR.4 =
1
Command Sequence
Error
1
Set Lock-Bit Error
0
Set Lock-Bit
Successful
Bus
Operation
Standby
Standby
Standby
Standby
Command
Comments
Check SR.3
1 = Programming Voltage Error
Detect
Check SR.1
1 = Device Protect Detect
WP# = V_IL
Check SR.4, 5
Both 1 = Command
Error
Check SR.4
1 = Set Lock-Bit Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear
Register command in cases where multiple lock-bits are set
full status is
If an error is detected, clear the status register before attempting
or other error
0609_11
Figure 11. Set Block Lock-Bit Flowchart
36
PRELIMINARY