DT28F160S570 Datasheet, PDF (34/51 Pages) Intel Corporation – 5 VOLT FlashFile™ MEMORY

28F160S5/28F320S5
E
Start
Device Supports
Queuing
Yes
Set Time-Out
Issue Block Queue Erase
Command 28H, Block
Address
No
Read Extended Status
Register
Erase Block
Time-Out?
0=No
Is Queue
Available?
XSR.7=
1=Yes
Another
Block
Erase?
Yes
Yes
Yes
Issue Erase Command 28H
Block Address
1=No
Read Extended
No
Status Register
Is Queue Full?
XSR.7=
0=Yes
Write Confirm D0H
Block Address
Bus
Operation
Command
Comments
Write
Erase Block
Data = 28H or 20H
Addr = Block Address
Read
XSR.7 = Valid
Addr = X
Standby
Check XSR.7
1 = Erase Queue Avail.
0 = No Erase Queue Avail.
Write
Erase Block
Data = 28H
Addr = Block Address
Read
SR.7 = Valid; SR.6 - 0 = X
With the device enabled,
OE# low updates SR
Addr = X
Standby
Check XSR.7
1 = Erase Queue Avail.
0 = No Erase Queue Avail.
No _{Write (Note 1)}
Erase
Confirm
Data = D0H
Addr = X
Read
Status register data
With the device enabled,
OE# low updates SR
Addr = X
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
1. The Erase Confirm byte must follow Erase Setup when
the Erase Queue status (XSR.7) = 0.
Full status check can be done after all erase and write
sequences complete. Write FFH after the last operation to
reset the device to read array mode.
Issue Single Block Erase
Command 20H, Block
Address
Write Confirm D0H
Block Address
Issue Read
Status Command
Another
Block
Erase?
No
Read
Status Register
No
SR.7 =
0
Suspend Erase ^Yes
Suspend
Erase Loop
1
Full Status
Check if Desired
Erase Flash
Block(s) Complete
Figure 9. Block Erase Flowchart
0609_09
34
PRELIMINARY