80960JD Datasheet, PDF (33/61 Pages) Intel Corporation – EMBEDDED 32-BIT MICROPROCESSOR

A
80960JD
Table 17. 80960JD AC Characteristics (40 MHz) (Sheet 2 of 3)
Symbol
T_OV2
T_{O F}
T_IS1
T_IH1
T_IS2
T_IH2
T_IS3
T_IH3
T_IS4
T_IH4
T_LXL
T_LXA
T_DXD
Parameter
Min
Max
Output Valid Delay, DT/R
Output Float Delay
0.5T_C + 3.5 0.5T_C + 18
3.5
16
SYNCHRONOUS INPUT TIMINGS
Input Setup to CLKIN — AD31:0, NMI,
8
XINT7:0
Input Hold from CLKIN — AD31:0, NMI,
2
XINT7:0
Input Setup to CLKIN — RDYRCV and
9
HOLD
Input Hold from CLKIN — RDYRCV and
1
HOLD
Input Setup to CLKIN — RESET
8
Input Hold from CLKIN — RESET
2
Input Setup to RESET — ONCE, STEST
8
Input Hold from RESET — ONCE,
2
STEST
RELATIVE OUTPUT TIMINGS
ALE/ALE Width
Address Hold from ALE/ALE Inactive
0.5T_C - 7.5
DT/R Valid to DEN Active
T_BSF
T_BSCH
TCK Frequency
TCK High Time
BOUNDARY SCAN TEST SIGNAL TIMINGS
0.5T_F
15
T_BSCL
TCK Low Time
15
T_BSCR
TCK Rise Time
5
T_BSCF
TCK Fall Time
5
T_BSIS1
T_BSIH1
T_BSOV1
T_BSOF1
Input Setup to TCK — TDI, TMS
Input Hold from TCK — TDI, TMS
TDO Valid Delay
TDO Float Delay
4
6
3
30
3
30
Units
ns
ns
Notes
(4)
ns (5)
ns (5)
ns (6)
ns (6)
ns (7)
ns (7)
ns (8 )
ns (8)
(9)
Equal
ns _{Loading (9)}
Equal
Loading (9)
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Measured at
1.5 V (1)
Measured at
1.5 V (1)
0.8 V to 2.0
V (1)
2.0 V to 0.8
V (1)
(1, 10)
(1, 10)
PRELIMINARY
29