80960JD Datasheet, PDF (16/61 Pages) Intel Corporation – EMBEDDED 32-BIT MICROPROCESSOR

80960JD
A
NAME
XINT7:0
NMI
Table 5. Pin Description — Interrupt Unit Signals
TYPE
I
A(E/L)
I
A(E)
DESCRIPTION
EXTERNAL INTERRUPT pins are used to request interrupt service. The XINT7:0
pins can be configured in three modes:
Dedicated Mode: Each pin is assigned a dedicated interrupt level. Dedicated inputs
can be programmed to be level (low) or edge (falling) sensitive.
Expanded Mode: All eight pins act as a vectored interrupt source. The interrupt pins
are level sensitive in this mode.
Mixed Mode:
The XINT7:5 pins act as dedicated sources and the XINT4:0 pins
act as the five most significant bits of a vectored source. The least
significant bits of the vectored source are set to 010₂ internally.
Unused external interrupt pins should be connected to V_CC.
NON-MASKABLE INTERRUPT causes a non-maskable interrupt event to occur.
NMI is the highest priority interrupt source and is falling edge-triggered. If NMI is
unused, it should be connected to V_CC.
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PRELIMINARY