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80960JD Datasheet, PDF (19/61 Pages) Intel Corporation – EMBEDDED 32-BIT MICROPROCESSOR
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80960JD
Table 6. 132-Lead PGA Pinout — In Signal Order
Signal
Pin
Signal
Pin
Signal
Pin
A2
C5
AD31
K3
TDI
D12
A3
C4
ADS
A1
TDO
B4
AD0
M14
ALE
G3
TMS
A14
AD1
L13
ALE
A3
TRST
C12
AD2
K12
BE0
H3
VCC
A6
AD3
N14
BE1
J3
VCC
A7
AD4
M13
BE2
L1
VCC
A8
AD5
L12
BE3
L2
VCC
A9
AD6
P14
BLAST
C3
VCC
D1
AD7
N13
BSTAT
F3
VCC
D14
AD8
M12
CLKIN
H14
VCC
E1
AD9
M11
D/C
B2
VCC
E14
AD10
N12
DEN
E3
VCC
F1
AD11
P13
DT/R
D3
VCC
F14
AD12
M10
FAIL
C6
VCC
G1
AD13
P12
HOLD
C9
VCC
G14
AD14
M9
HOLDA
C2
VCC
H1
AD15
M8
LOCK/ONCE
C1
VCC
J1
AD16
M7
NC
A4
VCC
J14
AD17
M6
NC
A5
VCC
K1
AD18
P4
NC
B5
VCC
K14
AD19
P3
NC
B14
VCC
L14
AD20
N4
NC
C7
VCC
P5
AD21
M5
NC
C8
VCC
P6
AD22
P2
NC
C14
VCC
P7
AD23
M4
NC
G12
VCC
P8
AD24
N3
NC
J12
VCC
P9
AD25
P1
NC
M3
VCC
P10
AD26
N2
NMI
A10
VCC
P11
AD27
N1
RDYRCV
F12
VCCPLL
H12
AD28
L3
RESET
E12
VSS
B6
AD29
M2
STEST
C13
VSS
B7
AD30
M1
TCK
B13
VSS
B8
NOTE: Do not connect any external logic to pins marked NC (no connect pins).
Signal
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
W/R
WIDTH/HLTD0
WIDTH/HLTD1
XINT0
XINT1
XINT2
XINT3
XINT4
XINT5
XINT6
XINT7
Pin
B9
D2
D13
E2
E13
F2
F13
G2
G13
H2
H13
J2
J13
K2
K13
N5
N6
N7
N8
N9
N10
N11
B1
B3
A2
C11
C10
A13
B12
B11
A12
B10
A11
PRELIMINARY
15
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