82562EZ Datasheet, PDF (3/40 Pages) Intel Corporation – 82562EZ 10/100 Mbps Platform LAN Connect (PLC)

Networking Silicon — 82562EZ
Revision History
Revision
0.5
0.6
1.0
1.1
1.2
1.3
1.4
1.5
Revision Date
Description
Sep 2001
Oct 2001
Initial release (Intel Secret)
Update to Table 10 - Pin Assignments (Intel Secret)
Apr 2002
Jul 2002
Added part number (Intel Confidential)
Table 15- Pin assignments revised from Rev. 1.3 to Rev 2.0
Nov 2003
Nov 2004
Nov 2004
Removed confidential status
Updated signal names to match design guides and reference schematics.
• Added lead-free information.
• Added Test Port Functionality section.
• Added information about migrating from a 2-layer 0.36 mm wide-trace sub-
strate to a 2-layer 0.32 mm wide-trace substrate. Refer to the section on
Package and Pinout Information.
• Added statement that no changes to existing soldering processes are
needed for the 2-layer 0.32 mm wide-trace substrate change in the section
describing “Package Information”.
January 2005 • Added a note for PHY signals RBIAS100 and RBIAS10 to Section 3.3.
Datasheet
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