82562EZ Datasheet, PDF (16/40 Pages) Intel Corporation – 82562EZ 10/100 Mbps Platform LAN Connect (PLC)

82562EZ — Networking Silicon
Symbol
6
7
8
9
A
B
C
D
E
F
I
J
K
T
R
V
V
V
V
H
V
V
V
V
V
V
5B Symbol Code
4B Nibble Code
01110
01111
10010
10011
10110
10111
11010
11011
11100
11101
11111
11000
10001
01101
00111
00000
00001
00010
00011
00100
00101
00110
01000
01100
10000
11001
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Inter Packet Idle Symbol
(No 4B)
1st Start of Packet Symbol
0101
2nd Start of Packet Symbol
0101
1st End of Packet Symbol
2nd End of Packet Symbol
and Flow Control
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
Flow Control S
INVALID
4.1.1.2
100BASE-TX Scrambler and MLT-3 Encoder
Data is scrambled in 100BASE-TX in order to reduce electromagnetic emissions during long transmissions of high-
frequency data codes. The scrambler logic accepts 5 bits from the 4B/5B encoder block and presents the scrambled
data to the MLT-3 encoder. The 82562EZ implements the 11-bit stream cipher scrambler as adopted by the ANSI
XT3T9.5 committee for UTP operation. The cipher equation used is:
X[n] = X[n-11] + X[n-9] (mod 2)
10
Datasheet