82562EZ Datasheet, PDF (15/40 Pages) Intel Corporation – 82562EZ 10/100 Mbps Platform LAN Connect (PLC)

Networking Silicon — 82562EZ
4.0
Physical Layer Interface Functionality
The 82562EZ is designed to work in Data Terminating Equipment (DTE) mode only. It supports a direct glueless
interface to all components that comply with the LAN Connect specification. The following figure shows how the
82562EZ PLC can be used in a 10/100 Mbps Ethernet switch design.
Figure 2. 82562EZ 10/100 Mbps Ethernet Solution
I/O Control Hub 4
(ICH4) LAN
Controller
82562EZ
(Platform LAN
Connect
Device)
Transmit Differential Pair
(TDP/TDN)
Receive Differential Pair
(RDP/RDN)
System Bus Interface
Magnetics
4.1
100BASE-TX Mode
4.1.1
100BASE-TX Transmit Blocks
The transmit subsection of the 82562EZ accepts 3 bit wide data from the LAN Connect unit. Another subsection
passes data unconditionally to the 4B/5B encoder.
The 4B/5B encoder accepts nibble-wide data (4 bits) from the CSMA unit and compiles it into 5-bit-wide parallel
symbols. These symbols are scrambled and serialized into a 125 Mbps bit stream, converted by the analog transmit
driver into a MLT-3 waveform format, and transmitted onto the Unshielded Twisted Pair (UTP) or Shielded Twisted
Pair (STP) wire.
4.1.1.1
100BASE-TX 4B/5B Encoder
The 4B/5B encoder complies with the IEEE 802.3u 100BASE-TX standard. Four bits are encoded according to the
transmit 4B/5B lookup table. The lookup table matches a 5-bit code to each 4-bit code. Table 2 lists the 4B/5B
encoding scheme associated with the given symbol.
Table 2. 4B/5B Encoder
Symbol
0
1
2
3
4
5
5B Symbol Code
11110
01001
10100
10101
01010
01011
4B Nibble Code
0000
0001
0010
0011
0100
0101
Datasheet
9